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coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <types.h>
#include <arch/io.h>
#include <device/pci_ops.h>
#include <console/console.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/smm.h>
#include <device/pci_def.h>
#include "i82801dx.h"
Go to the source code of this file.
Macros | |
#define | DEBUG_SMI |
#define | SMRAM 0x90 |
#define | D_OPEN (1 << 6) |
#define | D_CLS (1 << 5) |
#define | D_LCK (1 << 4) |
#define | G_SMRANE (1 << 3) |
#define | C_BASE_SEG ((0 << 2) | (1 << 1) | (0 << 0)) |
Typedefs | |
typedef void(* | smi_handler_t) (void) |
Functions | |
static u16 | reset_pm1_status (void) |
read and clear PM1_STS More... | |
static void | dump_pm1_status (u16 pm1_sts) |
static u32 | reset_smi_status (void) |
read and clear SMI_STS More... | |
static void | dump_smi_status (u32 smi_sts) |
static u32 | reset_gpe0_status (void) |
read and clear GPE0_STS More... | |
static void | dump_gpe0_status (u32 gpe0_sts) |
static u32 | reset_tco_status (void) |
read and clear TCOx_STS More... | |
static void | dump_tco_status (u32 tco_sts) |
void | southbridge_smi_set_eos (void) |
Set the EOS bit. More... | |
static void | busmaster_disable_on_bus (int bus) |
static void | southbridge_smi_sleep (void) |
static void | southbridge_smi_apmc (void) |
static void | southbridge_smi_pm1 (void) |
static void | southbridge_smi_gpe0 (void) |
static void | southbridge_smi_gpi (void) |
static void | southbridge_smi_mc (void) |
static void | southbridge_smi_tco (void) |
static void | southbridge_smi_periodic (void) |
void | southbridge_smi_handler (void) |
Interrupt handler for SMI#. More... | |
Variables | |
u16 | pmbase = PMBASE_ADDR |
smi_handler_t | southbridge_smi [32] |
#define C_BASE_SEG ((0 << 2) | (1 << 1) | (0 << 0)) |
Definition at line 20 of file smihandler.c.
#define D_CLS (1 << 5) |
Definition at line 17 of file smihandler.c.
#define D_LCK (1 << 4) |
Definition at line 18 of file smihandler.c.
#define D_OPEN (1 << 6) |
Definition at line 16 of file smihandler.c.
#define DEBUG_SMI |
Definition at line 12 of file smihandler.c.
#define G_SMRANE (1 << 3) |
Definition at line 19 of file smihandler.c.
#define SMRAM 0x90 |
Definition at line 15 of file smihandler.c.
Definition at line 418 of file smihandler.c.
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static |
Definition at line 187 of file smihandler.c.
References PCI_COMMAND, PCI_COMMAND_MASTER, PCI_DEV, PCI_HEADER_TYPE, PCI_HEADER_TYPE_BRIDGE, PCI_HEADER_TYPE_CARDBUS, PCI_PRIMARY_BUS, pci_read_config16(), pci_read_config32(), pci_read_config8(), PCI_VENDOR_ID, pci_write_config16(), and val.
Referenced by southbridge_smi_sleep().
Definition at line 114 of file smihandler.c.
References BIOS_DEBUG, and printk.
Referenced by southbridge_smi_gpe0().
Definition at line 42 of file smihandler.c.
References BIOS_SPEW, inw(), PM1_EN, pmbase, and printk.
Referenced by southbridge_smi_pm1().
Definition at line 73 of file smihandler.c.
References BIOS_DEBUG, and printk.
Referenced by southbridge_smi_handler().
Definition at line 156 of file smihandler.c.
References BIOS_DEBUG, and printk.
Referenced by southbridge_smi_tco().
read and clear GPE0_STS
Definition at line 103 of file smihandler.c.
References GPE0_STS, inl(), outl(), and pmbase.
Referenced by southbridge_smi_gpe0().
read and clear PM1_STS
Definition at line 31 of file smihandler.c.
References inw(), outw(), PM1_STS, and pmbase.
Referenced by southbridge_smi_pm1().
read and clear SMI_STS
Definition at line 62 of file smihandler.c.
References inl(), outl(), pmbase, and SMI_STS.
Referenced by southbridge_smi_handler().
read and clear TCOx_STS
Definition at line 142 of file smihandler.c.
References inl(), outl(), and pmbase.
Referenced by southbridge_smi_tco().
Definition at line 295 of file smihandler.c.
References APM_CNT_ACPI_DISABLE, APM_CNT_ACPI_ENABLE, apm_get_apmc(), inl(), outl(), PM1_CNT, pmbase, and SCI_EN.
Definition at line 333 of file smihandler.c.
References dump_gpe0_status(), and reset_gpe0_status().
Definition at line 341 of file smihandler.c.
References ALT_GP_SMI_EN, ALT_GP_SMI_STS, BIOS_DEBUG, inw(), mainboard_smi_gpi(), outl(), pmbase, and printk.
Interrupt handler for SMI#.
Definition at line 458 of file smihandler.c.
References BIOS_DEBUG, dump, dump_smi_status(), PCI_DEV, pci_read_config16(), pmbase, printk, reset_smi_status(), and southbridge_smi.
Definition at line 355 of file smihandler.c.
References BIOS_DEBUG, inl(), MCSMI_EN, pmbase, printk, and SMI_EN.
Definition at line 405 of file smihandler.c.
References BIOS_DEBUG, inl(), PERIODIC_EN, pmbase, printk, and SMI_EN.
Definition at line 315 of file smihandler.c.
References dump_pm1_status(), outl(), PM1_CNT, pmbase, PWRBTN_STS, and reset_pm1_status().
Definition at line 222 of file smihandler.c.
References ACPI_S0, ACPI_S1, ACPI_S3, ACPI_S4, ACPI_S5, BIOS_DEBUG, BIOS_SPEW, busmaster_disable_on_bus(), GEN_PMCON_3, GPE0_EN, inb(), inl(), MAINBOARD_POWER_KEEP, outb(), outl(), PCI_DEV, pci_read_config8(), pci_write_config8(), PM1_CNT, pmbase, printk, SCI_EN, SLP_EN, SLP_SMI_EN, SLP_TYP, SMI_EN, and wbinvd().
Definition at line 368 of file smihandler.c.
References BIOS_DEBUG, dump_tco_status(), PCI_DEV, pci_read_config16(), pci_write_config32(), printk, and reset_tco_status().
u16 pmbase = PMBASE_ADDR |
Definition at line 25 of file smihandler.c.
Referenced by dump_pm1_status(), mainboard_smi_ec(), reset_gpe0_status(), reset_pm1_status(), reset_smi_status(), reset_tco_status(), southbridge_smi_apmc(), southbridge_smi_gpi(), southbridge_smi_handler(), southbridge_smi_mc(), southbridge_smi_periodic(), southbridge_smi_pm1(), southbridge_smi_set_eos(), and southbridge_smi_sleep().
smi_handler_t southbridge_smi[32] |
Definition at line 420 of file smihandler.c.