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coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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Go to the source code of this file.
Enumerations | |
enum | tis_access { TPM_ACCESS_VALID = (1 << 7) , TPM_ACCESS_ACTIVE_LOCALITY = (1 << 5) , TPM_ACCESS_REQUEST_PENDING = (1 << 2) , TPM_ACCESS_REQUEST_USE = (1 << 1) , TPM_ACCESS_ESTABLISHMENT = (1 << 0) } |
enum | tis_status { TPM_STS_FAMILY_SHIFT = 26 , TPM_STS_FAMILY_MASK = (0x3 << TPM_STS_FAMILY_SHIFT) , TPM_STS_FAMILY_TPM_2_0 = (1 << TPM_STS_FAMILY_SHIFT) , TPM_STS_FAMILY_TPM_1_2 = (0 << TPM_STS_FAMILY_SHIFT) , TPM_STS_RESET_ESTABLISHMENT = (1 << 25) , TPM_STS_COMMAND_CANCEL = (1 << 24) , TPM_STS_BURST_COUNT_SHIFT = 8 , TPM_STS_BURST_COUNT_MASK = (0xFFFF << TPM_STS_BURST_COUNT_SHIFT) , TPM_STS_VALID = (1 << 7) , TPM_STS_COMMAND_READY = (1 << 6) , TPM_STS_GO = (1 << 5) , TPM_STS_DATA_AVAIL = (1 << 4) , TPM_STS_DATA_EXPECT = (1 << 3) , TPM_STS_SELF_TEST_DONE = (1 << 2) , TPM_STS_RESPONSE_RETRY = (1 << 1) } |
Functions | |
int | tis_init (void) |
int | tis_open (void) |
int | tis_close (void) |
int | tis_sendrecv (const u8 *sendbuf, size_t send_size, u8 *recvbuf, size_t *recv_len) |
int | tis_plat_irq_status (void) |
enum cb_err | tis_vendor_write (unsigned int addr, const void *sendbuf, size_t send_size) |
enum cb_err | tis_vendor_read (unsigned int addr, void *recvbuf, size_t recv_size) |
static bool | tpm_first_access_this_boot (void) |
enum tis_access |
enum tis_status |
int tis_close | ( | void | ) |
Definition at line 51 of file tis.c.
References chip, tpm_chip::is_open, printf, tis_drop_access(), tis_has_access(), tis_wait_dropped_access(), TPM_DRIVER_ERR, tpm_is_open, and tpm_vendor_cleanup().
Referenced by tis_open(), and tis_setup_interrupt().
int tis_init | ( | void | ) |
Definition at line 65 of file tis.c.
References BIOS_ERR, BIOS_INFO, info, printk, spi_setup_slave(), tis_get_dev_name(), tis_probe(), tpm2_get_info(), tpm2_init(), TPM_DRIVER_ERR, and tpm_vendor_probe().
Referenced by tlcl_lib_init().
int tis_open | ( | void | ) |
Definition at line 33 of file tis.c.
References BIOS_DEBUG, BIOS_ERR, chip, CONFIG, tpm_chip::is_open, printf, printk, ptt_active(), tis_close(), tis_command_ready(), tis_request_access(), tis_wait_received_access(), TPM_DRIVER_ERR, tpm_is_open, TPM_TIMEOUT_ERR, tpm_vendor_init(), and udelay().
Referenced by tis_setup_interrupt(), and tlcl_lib_init().
int tis_plat_irq_status | ( | void | ) |
Definition at line 49 of file cr50.c.
References acpi_get_gpe(), BIOS_WARNING, board_id(), CONFIG, CR50_IRQ, CR50_TIMEOUT_NOIRQ_MS, GPIO_18, GPIO_3, GPIO_85, GPIO_9, gpio_eint_poll(), GPIO_GSC_AP_INT, GPIO_GSC_AP_INT_ODL, GPIO_H1_AP_INT, gpio_interrupt_status(), mdelay(), and printk.
Referenced by cr50_i2c_read(), cr50_i2c_wait_tpm_ready(), cr50_i2c_write(), and fifo_transfer().
Definition at line 81 of file tis.c.
References ASSERT, BIOS_DEBUG, CONFIG, header, hexdump(), i2c_read_raw(), i2c_write_raw(), MIN, printf, printk, read_at_be32(), RECV_TIMEOUT, SLEEP_DURATION, stopwatch_expired(), stopwatch_init_msecs_expire(), tis_readresponse(), tis_senddata(), tpm2_process_command(), TPM_DRIVER_ERR, tpm_transmit(), udelay(), and XMIT_TIMEOUT.
Referenced by tpm_process_command(), and tpm_send_receive().
Definition at line 513 of file cr50.c.
References BIOS_DEBUG, BIOS_ERR, CB_SUCCESS, debug_level_, fifo_receive, fifo_transfer(), fifo_transmit, printk, read_be32(), read_tpm_sts(), fifo_transfer_buffer::rx_buffer, tpm2_read_reg(), TPM_DATA_FIFO_REG, tpm_info, TPM_STS_COMMAND_READY, TPM_STS_DATA_AVAIL, TPM_STS_GO, TPM_STS_VALID, trace_dump(), fifo_transfer_buffer::tx_buffer, tpm2_info::vendor_id, wait_for_status(), and write_tpm_sts().
Referenced by cr50_get_board_cfg().
Definition at line 114 of file tis.h.
References CONFIG, ENV_BOOTBLOCK, and ENV_SEPARATE_VERSTAGE.
Referenced by fifo_transfer(), and tpm_vendor_init().