3 #ifndef __SOC_ROCKCHIP_RK3288_CLOCK_H__
4 #define __SOC_ROCKCHIP_RK3288_CLOCK_H__
6 #include <soc/addressmap.h>
9 #define OSC_HZ (24*MHz)
11 #define GPLL_HZ (594*MHz)
12 #define CPLL_HZ (384*MHz)
13 #define NPLL_HZ (384*MHz)
22 #define PD_BUS_ACLK_HZ (297000*KHz)
23 #define PD_BUS_HCLK_HZ (148500*KHz)
24 #define PD_BUS_PCLK_HZ (74250*KHz)
26 #define PERI_ACLK_HZ (148500*KHz)
27 #define PERI_HCLK_HZ (148500*KHz)
28 #define PERI_PCLK_HZ (74250*KHz)
30 #define PWM_CLOCK_HZ PD_BUS_PCLK_HZ
static struct dramc_channel const ch[2]
void rkclk_ddr_phy_ctl_reset(u32 ch, u32 n)
void rkclk_configure_cpu(enum apll_frequencies apll_freq)
void rkclk_ddr_reset(u32 ch, u32 ctl, u32 phy)
int rkclk_was_watchdog_reset(void)
void rkclk_configure_tsadc(unsigned int hz)
unsigned int rkclk_i2c_clock_for_bus(unsigned int bus)
void rkclk_configure_vop_aclk(u32 vop_id, u32 aclk_hz)
void rkclk_configure_ddr(unsigned int hz)
void rkclk_configure_edp(void)
void rkclk_configure_i2s(unsigned int hz)
void rkclk_configure_spi(unsigned int bus, unsigned int hz)
void rkclk_configure_hdmi(void)
int rkclk_configure_vop_dclk(u32 vop_id, u32 dclk_hz)
void rkclk_configure_crypto(unsigned int hz)