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coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <soc/addressmap.h>
#include <types.h>
Go to the source code of this file.
Macros | |
#define | OSC_HZ (24*MHz) |
#define | GPLL_HZ (594*MHz) |
#define | CPLL_HZ (384*MHz) |
#define | NPLL_HZ (384*MHz) |
#define | PD_BUS_ACLK_HZ (297000*KHz) |
#define | PD_BUS_HCLK_HZ (148500*KHz) |
#define | PD_BUS_PCLK_HZ (74250*KHz) |
#define | PERI_ACLK_HZ (148500*KHz) |
#define | PERI_HCLK_HZ (148500*KHz) |
#define | PERI_PCLK_HZ (74250*KHz) |
#define | PWM_CLOCK_HZ PD_BUS_PCLK_HZ |
Enumerations | |
enum | apll_frequencies { APLL_1800_MHZ , APLL_1416_MHZ , APLL_600_MHZ , APLL_1512_MHZ , APLL_600_MHZ } |
Functions | |
void | rkclk_init (void) |
void | rkclk_configure_spi (unsigned int bus, unsigned int hz) |
void | rkclk_ddr_reset (u32 ch, u32 ctl, u32 phy) |
void | rkclk_ddr_phy_ctl_reset (u32 ch, u32 n) |
void | rkclk_configure_ddr (unsigned int hz) |
void | rkclk_configure_i2s (unsigned int hz) |
void | rkclk_configure_cpu (enum apll_frequencies apll_freq) |
void | rkclk_configure_crypto (unsigned int hz) |
void | rkclk_configure_tsadc (unsigned int hz) |
void | rkclk_configure_vop_aclk (u32 vop_id, u32 aclk_hz) |
int | rkclk_configure_vop_dclk (u32 vop_id, u32 dclk_hz) |
void | rkclk_configure_edp (void) |
void | rkclk_configure_hdmi (void) |
int | rkclk_was_watchdog_reset (void) |
unsigned int | rkclk_i2c_clock_for_bus (unsigned int bus) |
#define PWM_CLOCK_HZ PD_BUS_PCLK_HZ |
enum apll_frequencies |
void rkclk_configure_cpu | ( | enum apll_frequencies | apll_freq | ) |
Definition at line 309 of file clock.c.
References A12_DIV_MSK, A12_DIV_SHIFT, apll_cfgs, APLL_MODE_MSK, APLL_MODE_NORM, APLL_MODE_SLOW, ATCLK_DIV_MSK, ATCLK_DIV_SHIFT, CORE_SEL_PLL_MSK, rk3288_cru_reg::cru_apll_con, rk3288_cru_reg::cru_clksel_con, rk3288_cru_reg::cru_mode_con, cru_ptr, L2_DIV_MSK, M0_DIV_MSK, MP_DIV_MSK, MP_DIV_SHIFT, PCLK_DBG_DIV_MSK, PCLK_DBG_DIV_SHIFT, read32(), rk3288_grf, RK_CLRBITS, RK_CLRSETBITS, rkclk_set_pll(), rk3288_grf_regs::soc_status, SOCSTS_APLL_LOCK, udelay(), and write32().
Referenced by bootblock_mainboard_init(), mainboard_init(), soc_init(), and speed_up_boot_cpu().
Definition at line 472 of file clock.c.
References assert, rk3288_cru_reg::cru_clksel_con, cru_ptr, MHz, PD_BUS_ACLK_HZ, RK_CLRSETBITS, and write32().
Referenced by bootblock_soc_init().
Definition at line 565 of file clock.c.
References rk3288_cru_reg::cru_clksel_con, cru_ptr, rk3288_cru_reg::cru_softrst_con, RK_CLRBITS, RK_SETBITS, udelay(), and write32().
Referenced by rk_display_init().
Definition at line 576 of file clock.c.
References rk3288_cru_reg::cru_clkgate_con, cru_ptr, rk3288_cru_reg::cru_softrst_con, RK_CLRBITS, RK_SETBITS, udelay(), and write32().
Referenced by rk_display_init().
Definition at line 405 of file clock.c.
References ch, cru_ptr, rk3288_cru_reg::cru_softrst_con, RK_CLRSETBITS, and write32().
Referenced by sdram_init().