coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
rl5c476.c File Reference
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ops.h>
#include <device/pci_ids.h>
#include <console/console.h>
#include <device/cardbus.h>
#include <delay.h>
#include "rl5c476.h"
#include "chip.h"
Include dependency graph for rl5c476.c:

Go to the source code of this file.

Functions

static void rl5c476_init (struct device *dev)
 
static void rl5c476_read_resources (struct device *dev)
 
static void rl5c476_set_resources (struct device *dev)
 
static void rl5c476_set_subsystem (struct device *dev, unsigned int vendor, unsigned int device)
 
static void southbridge_init (struct device *dev)
 

Variables

static int enable_cf_boot = 0
 
static unsigned int cf_base
 
static struct pci_operations rl5c476_pci_ops
 
static struct device_operations ricoh_rl5c476_ops
 
static const struct pci_driver ricoh_rl5c476_driver __pci_driver
 
struct chip_operations southbridge_ricoh_rl5c476_ops
 

Function Documentation

◆ rl5c476_init()

◆ rl5c476_read_resources()

static void rl5c476_read_resources ( struct device dev)
static

◆ rl5c476_set_resources()

static void rl5c476_set_resources ( struct device dev)
static

◆ rl5c476_set_subsystem()

static void rl5c476_set_subsystem ( struct device dev,
unsigned int  vendor,
unsigned int  device 
)
static

Definition at line 179 of file rl5c476.c.

◆ southbridge_init()

static void southbridge_init ( struct device dev)
static

Variable Documentation

◆ __pci_driver

const struct pci_driver ricoh_rl5c476_driver __pci_driver
static
Initial value:
= {
.vendor = PCI_VID_RICOH,
}
#define PCI_VID_RICOH
Definition: pci_ids.h:1656
#define PCI_DID_RICOH_RL5C476
Definition: pci_ids.h:1660
static struct device_operations ricoh_rl5c476_ops
Definition: rl5c476.c:196

Definition at line 179 of file rl5c476.c.

◆ cf_base

unsigned int cf_base
static

Definition at line 14 of file rl5c476.c.

Referenced by rl5c476_init(), and rl5c476_set_resources().

◆ enable_cf_boot

int enable_cf_boot = 0
static

◆ ricoh_rl5c476_ops

struct device_operations ricoh_rl5c476_ops
static
Initial value:
= {
.read_resources = rl5c476_read_resources,
.set_resources = rl5c476_set_resources,
.enable_resources = cardbus_enable_resources,
.init = rl5c476_init,
.scan_bus = pci_scan_bridge,
.ops_pci = &rl5c476_pci_ops,
}
void cardbus_enable_resources(struct device *dev)
void pci_scan_bridge(struct device *dev)
Scan a PCI bridge and the buses behind the bridge.
Definition: pci_device.c:1598
static void rl5c476_init(struct device *dev)
Definition: rl5c476.c:16
static void rl5c476_read_resources(struct device *dev)
Definition: rl5c476.c:143
static struct pci_operations rl5c476_pci_ops
Definition: rl5c476.c:192
static void rl5c476_set_resources(struct device *dev)
Definition: rl5c476.c:162

Definition at line 179 of file rl5c476.c.

◆ rl5c476_pci_ops

struct pci_operations rl5c476_pci_ops
static
Initial value:
= {
.set_subsystem = rl5c476_set_subsystem,
}
static void rl5c476_set_subsystem(struct device *dev, unsigned int vendor, unsigned int device)
Definition: rl5c476.c:179

Definition at line 179 of file rl5c476.c.

◆ southbridge_ricoh_rl5c476_ops

struct chip_operations southbridge_ricoh_rl5c476_ops
Initial value:
= {
.enable_dev = southbridge_init,
}
static void southbridge_init(struct device *dev)
Definition: rl5c476.c:211

Definition at line 211 of file rl5c476.c.