coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ops.h>
#include <device/pci_ids.h>
#include <console/console.h>
#include <device/cardbus.h>
#include <delay.h>
#include "rl5c476.h"
#include "chip.h"
Go to the source code of this file.
Functions | |
static void | rl5c476_init (struct device *dev) |
static void | rl5c476_read_resources (struct device *dev) |
static void | rl5c476_set_resources (struct device *dev) |
static void | rl5c476_set_subsystem (struct device *dev, unsigned int vendor, unsigned int device) |
static void | southbridge_init (struct device *dev) |
Variables | |
static int | enable_cf_boot = 0 |
static unsigned int | cf_base |
static struct pci_operations | rl5c476_pci_ops |
static struct device_operations | ricoh_rl5c476_ops |
static const struct pci_driver ricoh_rl5c476_driver | __pci_driver |
struct chip_operations | southbridge_ricoh_rl5c476_ops |
Definition at line 16 of file rl5c476.c.
References pc16reg::awinen, base, BIOS_DEBUG, cf_base, pci_path::devfn, enable_cf_boot, pc16reg::igctrl, pc16reg::ioctrl, pc16reg::ioffh0, pc16reg::ioffh1, pc16reg::ioffl0, pc16reg::ioffl1, pc16reg::iosph0, pc16reg::iosph1, pc16reg::iospl0, pc16reg::iospl1, pc16reg::iosth0, pc16reg::iosth1, pc16reg::iostl0, pc16reg::iostl1, pc16reg::miscc1, pc16reg::moffh0, pc16reg::moffl0, device::path, device_path::pci, PCI_FUNC, pci_read_config32(), pci_write_config16(), printk, pc16reg::pwctrl, pc16reg::smpga0, pc16reg::smsph0, pc16reg::smspl0, pc16reg::smsth0, pc16reg::smstl0, and udelay().
Definition at line 143 of file rl5c476.c.
References resource::align, cardbus_read_resources(), pci_path::devfn, enable_cf_boot, resource::flags, resource::gran, IORESOURCE_MEM, resource::limit, new_resource(), device::path, device_path::pci, PCI_FUNC, and resource::size.
Definition at line 162 of file rl5c476.c.
References resource::base, BIOS_DEBUG, cf_base, dev_path(), pci_path::devfn, enable_cf_boot, find_resource(), resource::flags, IORESOURCE_STORED, device::path, device_path::pci, pci_dev_set_resources(), PCI_FUNC, and printk.
Definition at line 211 of file rl5c476.c.
References device::chip_info, southbridge_ricoh_rl5c476_config::enable_cf, and enable_cf_boot.
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Definition at line 14 of file rl5c476.c.
Referenced by rl5c476_init(), and rl5c476_set_resources().
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Definition at line 13 of file rl5c476.c.
Referenced by rl5c476_init(), rl5c476_read_resources(), rl5c476_set_resources(), and southbridge_init().
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struct chip_operations southbridge_ricoh_rl5c476_ops |