coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
early.c
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <amdblocks/acpimmio.h>
4 #include "SBPLATFORM.h"
5 #include "sb_cimx.h"
6 #include "cfg.h" /*sb800_cimx_config*/
7 
8 /**
9  * @brief South Bridge CIMx romstage entry,
10  * wrapper of sbPowerOnInit entry point.
11  */
12 void sb_Poweron_Init(void)
13 {
14  AMDSBCFG sb_early_cfg;
15 
16  sb800_cimx_config(&sb_early_cfg);
17  //sb_early_cfg.StdHeader.Func = SB_POWERON_INIT;
18  //AmdSbDispatcher(&sb_early_cfg);
19  //TODO
20  //AMD_IMAGE_HEADER was missing, when using AmdSbDispatcher,
21  // VerifyImage() will fail, LocateImage() takes minutes to find the image.
22  sbPowerOnInit(&sb_early_cfg);
23 }
24 
25 /**
26  * CIMX not set the clock to 48Mhz until sbBeforePciInit,
27  * coreboot may need to set this even more earlier
28  */
30 {
31 
32  misc_write32(0x40, misc_read32(0x40) & (~5));
33  misc_write32(0x40, misc_read32(0x40) | 2);
34 }
static uint32_t misc_read32(uint8_t reg)
Definition: acpimmio.h:266
static void misc_write32(uint8_t reg, uint32_t value)
Definition: acpimmio.h:281
void sb800_cimx_config(AMDSBCFG *sb_config)
South Bridge CIMx configuration.
Definition: cfg.c:16
void sb800_clk_output_48Mhz(void)
CIMX not set the clock to 48Mhz until sbBeforePciInit, coreboot may need to set this even more earlie...
Definition: early.c:29
void sb_Poweron_Init(void)
South Bridge CIMx romstage entry, wrapper of sbPowerOnInit entry point.
Definition: early.c:12