14 AMDSBCFG sb_early_cfg;
22 sbPowerOnInit(&sb_early_cfg);
static uint32_t misc_read32(uint8_t reg)
static void misc_write32(uint8_t reg, uint32_t value)
void sb800_cimx_config(AMDSBCFG *sb_config)
South Bridge CIMx configuration.
void sb800_clk_output_48Mhz(void)
CIMX not set the clock to 48Mhz until sbBeforePciInit, coreboot may need to set this even more earlie...
void sb_Poweron_Init(void)
South Bridge CIMx romstage entry, wrapper of sbPowerOnInit entry point.