25 sb_config->StdHeader.PcieBasePtr = PCIEX_BASE_ADDRESS;
30 sb_config->BuildParameters.WatchDogTimerBase = WATCHDOG_TIMER_BASE_ADDRESS;
31 sb_config->BuildParameters.AcpiGpe0BlkAddr = GPE0_BLK_ADDRESS;
32 sb_config->BuildParameters.CpuControlBlkAddr = CPU_CNT_BLK_ADDRESS;
33 sb_config->BuildParameters.AcpiPmTmrBlkAddr = PM1_TMR_BLK_ADDRESS;
34 sb_config->BuildParameters.AcpiPm1CntBlkAddr = PM1_CNT_BLK_ADDRESS;
35 sb_config->BuildParameters.AcpiPm1EvtBlkAddr = PM1_EVT_BLK_ADDRESS;
36 sb_config->BuildParameters.SioPmeBaseAddress = SIO_PME_BASE_ADDRESS;
39 sb_config->BuildParameters.GecShadowRomBase = GEC_BASE_ADDRESS;
40 sb_config->BuildParameters.Smbus0BaseAddress = SMBUS0_BASE_ADDRESS;
41 sb_config->BuildParameters.Smbus1BaseAddress = SMBUS1_BASE_ADDRESS;
42 sb_config->BuildParameters.SataIDESsid = SATA_IDE_MODE_SSID;
43 sb_config->BuildParameters.SataRAIDSsid = SATA_RAID_MODE_SSID;
44 sb_config->BuildParameters.SataRAID5Ssid = SATA_RAID5_MODE_SSID;
45 sb_config->BuildParameters.SataAHCISsid = SATA_AHCI_SSID;
46 sb_config->BuildParameters.OhciSsid = OHCI_SSID;
47 sb_config->BuildParameters.EhciSsid = EHCI_SSID;
48 sb_config->BuildParameters.Ohci4Ssid = OHCI4_SSID;
49 sb_config->BuildParameters.SmbusSsid = SMBUS_SSID;
50 sb_config->BuildParameters.IdeSsid = IDE_SSID;
51 sb_config->BuildParameters.AzaliaSsid = AZALIA_SSID;
52 sb_config->BuildParameters.LpcSsid = LPC_SSID;
53 sb_config->BuildParameters.PCIBSsid = PCIB_SSID;
54 sb_config->BuildParameters.SpreadSpectrumType = Spread_Spectrum_Type;
56 sb_config->BuildParameters.ImcEnableOverWrite = IMC_ENABLE_OVER_WRITE;
75 sb_config->SATAMODE.SataMode.SataIdeCombMdPriSecOpt = 0;
77 sb_config->SATAMODE.SataMode.SataIdeCombinedMode = CONFIG_IDE_COMBINED_MODE;
85 #ifdef AZALIA_OEM_VERB_TABLE
101 sb_config->PORTCONFIG[0].PortCfg.PortPresent = CIMX_OPTION_ENABLED;
102 sb_config->PORTCONFIG[1].PortCfg.PortPresent = CIMX_OPTION_ENABLED;
103 sb_config->PORTCONFIG[2].PortCfg.PortPresent = CIMX_OPTION_ENABLED;
104 sb_config->PORTCONFIG[3].PortCfg.PortPresent = CIMX_OPTION_ENABLED;
static int acpi_is_wakeup_s3(void)
#define HPET_BASE_ADDRESS
void sb800_cimx_config(AMDSBCFG *sb_config)
South Bridge CIMx configuration.
static AMDSBCFG * sb_config