coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
cfg.c File Reference
#include <arch/hpet.h>
#include "SBPLATFORM.h"
#include "cfg.h"
#include <OEM.h>
#include <acpi/acpi.h>
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Functions

void sb800_cimx_config (AMDSBCFG *sb_config)
 South Bridge CIMx configuration. More...
 

Function Documentation

◆ sb800_cimx_config()

void sb800_cimx_config ( AMDSBCFG *  sb_config)

South Bridge CIMx configuration.

should be called before executing CIMx functions. this function will be called in romstage and ramstage.

Definition at line 16 of file cfg.c.

References acpi_is_wakeup_s3(), AZALIA_CONTROLLER, AZALIA_OEM_VERB_TABLE, AZALIA_PIN_CONFIG, AZALIA_SDIN_PIN, BIOS_SIZE, bios_size, CONFIG, GEC_CONFIG, GPP_CFGMODE, GPP_CONTROLLER, HPET_BASE_ADDRESS, HPET_TIMER, LEGACY_FREE, NB_SB_GEN2, NULL, PCI_CLOCK_CTRL, SATA_CLOCK_SOURCE, SATA_CONTROLLER, SATA_IDE_MODE, SATA_MODE, SATA_PORT_MULT_CAP_RESERVED, sb_config, SB_GPP_GEN2, SB_GPP_UNHIDE_PORTS, SIO_HWM_BASE_ADDRESS, SPI_BASE_ADDRESS, SPREAD_SPECTRUM, USB_CONFIG, and USB_RX_MODE.

Referenced by sb800_init(), and sb_Poweron_Init().

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