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coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
anx7625.h File Reference
#include <edid.h>
#include <types.h>
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Data Structures

struct  display_timing
 

Macros

#define LOG_TAG   "anx7625dp"
 
#define ANX7625_DRV_VERSION   "0.1.04"
 
#define OCM_LOADING_TIME   10
 
#define ANXI2CSIM
 
#define TX_P0_ADDR   0x38
 
#define TX_P1_ADDR   0x3D
 
#define TX_P2_ADDR   0x39
 
#define RX_P0_ADDR   0x3F
 
#define RX_P1_ADDR   0x42
 
#define RX_P2_ADDR   0x2A
 
#define TCPC_INTERFACE_ADDR   0x2C
 
#define RSVD_00_ADDR   0x00
 
#define RSVD_D1_ADDR   0xD1
 
#define RSVD_60_ADDR   0x60
 
#define RSVD_39_ADDR   0x39
 
#define RSVD_7F_ADDR   0x7F
 
#define XTAL_FRQ   (27*1000000)
 
#define POST_DIVIDER_MIN   1
 
#define POST_DIVIDER_MAX   16
 
#define PLL_OUT_FREQ_MIN   520000000UL
 
#define PLL_OUT_FREQ_MAX   730000000UL
 
#define PLL_OUT_FREQ_ABS_MIN   300000000UL
 
#define PLL_OUT_FREQ_ABS_MAX   800000000UL
 
#define MAX_UNSIGNED_24BIT   16777215UL
 
#define PRODUCT_ID_L   0x02
 
#define PRODUCT_ID_H   0x03
 
#define INTR_ALERT_1   0xCC
 
#define INTR_SOFTWARE_INT   (1<<3)
 
#define INTR_RECEIVED_MSG   (1<<5)
 
#define SYSTEM_STSTUS   0x45
 
#define INTERFACE_CHANGE_INT   0x44
 
#define HPD_STATUS_CHANGE   0x80
 
#define HPD_STATUS   0x80
 
#define I2C_ADDR_70_DPTX   0x70
 
#define SP_TX_LINK_BW_SET_REG   0xA0
 
#define SP_TX_LANE_COUNT_SET_REG   0xA1
 
#define M_VID_0   0xC0
 
#define M_VID_1   0xC1
 
#define M_VID_2   0xC2
 
#define N_VID_0   0xC3
 
#define N_VID_1   0xC4
 
#define N_VID_2   0xC5
 
#define AUX_RST   0x04
 
#define RST_CTRL2   0x07
 
#define SP_TX_TOTAL_LINE_STA_L   0x24
 
#define SP_TX_TOTAL_LINE_STA_H   0x25
 
#define SP_TX_ACT_LINE_STA_L   0x26
 
#define SP_TX_ACT_LINE_STA_H   0x27
 
#define SP_TX_V_F_PORCH_STA   0x28
 
#define SP_TX_V_SYNC_STA   0x29
 
#define SP_TX_V_B_PORCH_STA   0x2A
 
#define SP_TX_TOTAL_PIXEL_STA_L   0x2B
 
#define SP_TX_TOTAL_PIXEL_STA_H   0x2C
 
#define SP_TX_ACT_PIXEL_STA_L   0x2D
 
#define SP_TX_ACT_PIXEL_STA_H   0x2E
 
#define SP_TX_H_F_PORCH_STA_L   0x2F
 
#define SP_TX_H_F_PORCH_STA_H   0x30
 
#define SP_TX_H_SYNC_STA_L   0x31
 
#define SP_TX_H_SYNC_STA_H   0x32
 
#define SP_TX_H_B_PORCH_STA_L   0x33
 
#define SP_TX_H_B_PORCH_STA_H   0x34
 
#define SP_TX_VID_CTRL   0x84
 
#define SP_TX_BPC_MASK   0xE0
 
#define SP_TX_BPC_6   0x00
 
#define SP_TX_BPC_8   0x20
 
#define SP_TX_BPC_10   0x40
 
#define SP_TX_BPC_12   0x60
 
#define VIDEO_BIT_MATRIX_12   0x4c
 
#define AUDIO_CHANNEL_STATUS_1   0xd0
 
#define AUDIO_CHANNEL_STATUS_2   0xd1
 
#define AUDIO_CHANNEL_STATUS_3   0xd2
 
#define AUDIO_CHANNEL_STATUS_4   0xd3
 
#define AUDIO_CHANNEL_STATUS_5   0xd4
 
#define AUDIO_CHANNEL_STATUS_6   0xd5
 
#define TDM_SLAVE_MODE   0x10
 
#define I2S_SLAVE_MODE   0x08
 
#define AUDIO_CONTROL_REGISTER   0xe6
 
#define TDM_TIMING_MODE   0x08
 
#define I2C_ADDR_72_DPTX   0x72
 
#define VIDEO_CONTROL_0   0x08
 
#define ACTIVE_LINES_L   0x14
 
#define ACTIVE_LINES_H   0x15 /* note: bit[7:6] are reserved */
 
#define VERTICAL_FRONT_PORCH   0x16
 
#define VERTICAL_SYNC_WIDTH   0x17
 
#define VERTICAL_BACK_PORCH   0x18
 
#define HORIZONTAL_TOTAL_PIXELS_L   0x19
 
#define HORIZONTAL_TOTAL_PIXELS_H   0x1A /* note: bit[7:6] are reserved */
 
#define HORIZONTAL_ACTIVE_PIXELS_L   0x1B
 
#define HORIZONTAL_ACTIVE_PIXELS_H   0x1C /* note: bit[7:6] are reserved */
 
#define HORIZONTAL_FRONT_PORCH_L   0x1D
 
#define HORIZONTAL_FRONT_PORCH_H   0x1E /* note: bit[7:4] are reserved */
 
#define HORIZONTAL_SYNC_WIDTH_L   0x1F
 
#define HORIZONTAL_SYNC_WIDTH_H   0x20 /* note: bit[7:4] are reserved */
 
#define HORIZONTAL_BACK_PORCH_L   0x21
 
#define HORIZONTAL_BACK_PORCH_H   0x22 /* note: bit[7:4] are reserved */
 
#define I2C_ADDR_7E_FLASH_CONTROLLER   0x7E
 
#define XTAL_FRQ_SEL   0x3F
 
#define XTAL_FRQ_SEL_POS   5
 
#define XTAL_FRQ_19M2   (0 << XTAL_FRQ_SEL_POS)
 
#define XTAL_FRQ_27M   (4 << XTAL_FRQ_SEL_POS)
 
#define R_DSC_CTRL_0   0x40
 
#define READ_STATUS_EN   7
 
#define CLK_1MEG_RB   6 /* 1MHz clock reset; 0=reset, 0=reset release */
 
#define DSC_BIST_DONE   1 /* bit[5:1]: 1=DSC MBIST pass */
 
#define DSC_EN   0x01 /* 1=DSC enabled, 0=DSC disabled */
 
#define OCM_FW_VERSION   0x31
 
#define OCM_FW_REVERSION   0x32
 
#define AP_AUX_ADDR_7_0   0x11
 
#define AP_AUX_ADDR_15_8   0x12
 
#define AP_AUX_ADDR_19_16   0x13
 
#define AP_AUX_CTRL_STATUS   0x14
 
#define AP_AUX_CTRL_OP_EN   0x10
 
#define AP_AUX_CTRL_ADDRONLY   0x20
 
#define AP_AUX_BUFF_START   0x15
 
#define PIXEL_CLOCK_L   0x25
 
#define PIXEL_CLOCK_H   0x26
 
#define AP_AUX_COMMAND   0x27 /* com+len */
 
#define AP_AV_STATUS   0x28
 
#define AP_VIDEO_CHG   (1<<2)
 
#define AP_AUDIO_CHG   (1<<3)
 
#define AP_MIPI_MUTE   (1<<4) /* 1:MIPI input mute, 0: ummute */
 
#define AP_MIPI_RX_EN   (1<<5) /* 1: MIPI RX input in 0: no RX in */
 
#define AP_DISABLE_PD   (1<<6)
 
#define AP_DISABLE_DISPLAY   (1<<7)
 
#define MIPI_PHY_CONTROL_3   0x03
 
#define MIPI_HS_PWD_CLK   7
 
#define MIPI_HS_RT_CLK   6
 
#define MIPI_PD_CLK   5
 
#define MIPI_CLK_RT_MANUAL_PD_EN   4
 
#define MIPI_CLK_HS_MANUAL_PD_EN   3
 
#define MIPI_CLK_DET_DET_BYPASS   2
 
#define MIPI_CLK_MISS_CTRL   1
 
#define MIPI_PD_LPTX_CH_MANUAL_PD_EN   0
 
#define MIPI_LANE_CTRL_0   0x05
 
#define MIPI_TIME_HS_PRPR   0x08
 
#define MIPI_VIDEO_STABLE_CNT   0x0A
 
#define MIPI_LANE_CTRL_10   0x0F
 
#define MIPI_DIGITAL_ADJ_1   0x1B
 
#define MIPI_PLL_M_NUM_23_16   0x1E
 
#define MIPI_PLL_M_NUM_15_8   0x1F
 
#define MIPI_PLL_M_NUM_7_0   0x20
 
#define MIPI_PLL_N_NUM_23_16   0x21
 
#define MIPI_PLL_N_NUM_15_8   0x22
 
#define MIPI_PLL_N_NUM_7_0   0x23
 
#define MIPI_DIGITAL_PLL_6   0x2A
 
#define MIPI_M_NUM_READY   0x10
 
#define MIPI_N_NUM_READY   0x08
 
#define STABLE_INTEGER_CNT_EN   0x04
 
#define MIPI_PLL_TEST_BIT   0
 
#define MIPI_DIGITAL_PLL_7   0x2B
 
#define MIPI_PLL_FORCE_N_EN   7
 
#define MIPI_PLL_FORCE_BAND_EN   6
 
#define MIPI_PLL_VCO_TUNE_REG   4
 
#define MIPI_PLL_VCO_TUNE_REG_VAL   0x30
 
#define MIPI_PLL_PLL_LDO_BIT   2
 
#define MIPI_PLL_RESET_N   0x02
 
#define MIPI_FRQ_FORCE_NDET   0
 
#define MIPI_ALERT_CLR_0   0x2D
 
#define HS_link_error_clear   7
 
#define MIPI_ALERT_OUT_0   0x31
 
#define check_sum_err_hs_sync   7
 
#define MIPI_DIGITAL_PLL_8   0x33
 
#define MIPI_POST_DIV_VAL   4
 
#define MIPI_EN_LOCK_FRZ   3
 
#define MIPI_FRQ_COUNTER_RST   2
 
#define MIPI_FRQ_SET_REG_8   1
 
#define MIPI_DIGITAL_PLL_9   0x34
 
#define MIPI_DIGITAL_PLL_16   0x3B
 
#define MIPI_FRQ_FREEZE_NDET   7
 
#define MIPI_FRQ_REG_SET_ENABLE   6
 
#define MIPI_REG_FORCE_SEL_EN   5
 
#define MIPI_REG_SEL_DIV_REG   4
 
#define MIPI_REG_FORCE_PRE_DIV_EN   3
 
#define MIPI_FREF_D_IND   1
 
#define REF_CLK_27000kHz   1
 
#define REF_CLK_19200kHz   0
 
#define MIPI_REG_PLL_PLL_TEST_ENABLE   0
 
#define MIPI_DIGITAL_PLL_18   0x3D
 
#define FRQ_COUNT_RB_SEL   7
 
#define REG_FORCE_POST_DIV_EN   6
 
#define MIPI_DPI_SELECT   5
 
#define SELECT_DSI   1
 
#define SELECT_DPI   0
 
#define REG_BAUD_DIV_RATIO   0
 
#define H_BLANK_L   0x3E
 
#define H_BLANK_H   0x3F
 
#define MIPI_SWAP   0x4A
 
#define MIPI_SWAP_CH0   7
 
#define MIPI_SWAP_CH1   6
 
#define MIPI_SWAP_CH2   5
 
#define MIPI_SWAP_CH3   4
 
#define MIPI_SWAP_CLK   3
 
#define DPCD_DPCD_REV   0x00
 
#define DPCD_MAX_LINK_RATE   0x01
 
#define DPCD_MAX_LANE_COUNT   0x02
 
#define I2S_CH_2   0x01
 
#define TDM_CH_4   0x03
 
#define TDM_CH_6   0x05
 
#define TDM_CH_8   0x07
 
#define MAX_DPCD_BUFFER_SIZE   16
 
#define ONE_BLOCK_SIZE   128
 
#define FOUR_BLOCK_SIZE   (128*4)
 

Enumerations

enum  AudioFs {
  AUDIO_FS_441K = 0x00 , AUDIO_FS_48K = 0x02 , AUDIO_FS_32K = 0x03 , AUDIO_FS_882K = 0x08 ,
  AUDIO_FS_96K = 0x0a , AUDIO_FS_1764K = 0x0c , AUDIO_FS_192K = 0x0e
}
 
enum  AudioWdLen {
  AUDIO_W_LEN_16_20MAX = 0x02 , AUDIO_W_LEN_18_20MAX = 0x04 , AUDIO_W_LEN_17_20MAX = 0x0c , AUDIO_W_LEN_19_20MAX = 0x08 ,
  AUDIO_W_LEN_20_20MAX = 0x0a , AUDIO_W_LEN_20_24MAX = 0x03 , AUDIO_W_LEN_22_24MAX = 0x05 , AUDIO_W_LEN_21_24MAX = 0x0d ,
  AUDIO_W_LEN_23_24MAX = 0x09 , AUDIO_W_LEN_24_24MAX = 0x0b
}
 

Functions

int anx7625_dp_start (uint8_t bus, const struct edid *edid)
 
int anx7625_dp_get_edid (uint8_t bus, struct edid *out)
 
int anx7625_init (uint8_t bus)
 

Macro Definition Documentation

◆ ACTIVE_LINES_H

#define ACTIVE_LINES_H   0x15 /* note: bit[7:6] are reserved */

Definition at line 135 of file anx7625.h.

◆ ACTIVE_LINES_L

#define ACTIVE_LINES_L   0x14

Definition at line 134 of file anx7625.h.

◆ ANX7625_DRV_VERSION

#define ANX7625_DRV_VERSION   "0.1.04"

Definition at line 13 of file anx7625.h.

◆ ANXI2CSIM

#define ANXI2CSIM

Definition at line 19 of file anx7625.h.

◆ AP_AUDIO_CHG

#define AP_AUDIO_CHG   (1<<3)

Definition at line 191 of file anx7625.h.

◆ AP_AUX_ADDR_15_8

#define AP_AUX_ADDR_15_8   0x12

Definition at line 174 of file anx7625.h.

◆ AP_AUX_ADDR_19_16

#define AP_AUX_ADDR_19_16   0x13

Definition at line 175 of file anx7625.h.

◆ AP_AUX_ADDR_7_0

#define AP_AUX_ADDR_7_0   0x11

Definition at line 173 of file anx7625.h.

◆ AP_AUX_BUFF_START

#define AP_AUX_BUFF_START   0x15

Definition at line 182 of file anx7625.h.

◆ AP_AUX_COMMAND

#define AP_AUX_COMMAND   0x27 /* com+len */

Definition at line 186 of file anx7625.h.

◆ AP_AUX_CTRL_ADDRONLY

#define AP_AUX_CTRL_ADDRONLY   0x20

Definition at line 180 of file anx7625.h.

◆ AP_AUX_CTRL_OP_EN

#define AP_AUX_CTRL_OP_EN   0x10

Definition at line 179 of file anx7625.h.

◆ AP_AUX_CTRL_STATUS

#define AP_AUX_CTRL_STATUS   0x14

Definition at line 178 of file anx7625.h.

◆ AP_AV_STATUS

#define AP_AV_STATUS   0x28

Definition at line 189 of file anx7625.h.

◆ AP_DISABLE_DISPLAY

#define AP_DISABLE_DISPLAY   (1<<7)

Definition at line 195 of file anx7625.h.

◆ AP_DISABLE_PD

#define AP_DISABLE_PD   (1<<6)

Definition at line 194 of file anx7625.h.

◆ AP_MIPI_MUTE

#define AP_MIPI_MUTE   (1<<4) /* 1:MIPI input mute, 0: ummute */

Definition at line 192 of file anx7625.h.

◆ AP_MIPI_RX_EN

#define AP_MIPI_RX_EN   (1<<5) /* 1: MIPI RX input in 0: no RX in */

Definition at line 193 of file anx7625.h.

◆ AP_VIDEO_CHG

#define AP_VIDEO_CHG   (1<<2)

Definition at line 190 of file anx7625.h.

◆ AUDIO_CHANNEL_STATUS_1

#define AUDIO_CHANNEL_STATUS_1   0xd0

Definition at line 118 of file anx7625.h.

◆ AUDIO_CHANNEL_STATUS_2

#define AUDIO_CHANNEL_STATUS_2   0xd1

Definition at line 119 of file anx7625.h.

◆ AUDIO_CHANNEL_STATUS_3

#define AUDIO_CHANNEL_STATUS_3   0xd2

Definition at line 120 of file anx7625.h.

◆ AUDIO_CHANNEL_STATUS_4

#define AUDIO_CHANNEL_STATUS_4   0xd3

Definition at line 121 of file anx7625.h.

◆ AUDIO_CHANNEL_STATUS_5

#define AUDIO_CHANNEL_STATUS_5   0xd4

Definition at line 122 of file anx7625.h.

◆ AUDIO_CHANNEL_STATUS_6

#define AUDIO_CHANNEL_STATUS_6   0xd5

Definition at line 123 of file anx7625.h.

◆ AUDIO_CONTROL_REGISTER

#define AUDIO_CONTROL_REGISTER   0xe6

Definition at line 127 of file anx7625.h.

◆ AUX_RST

#define AUX_RST   0x04

Definition at line 88 of file anx7625.h.

◆ check_sum_err_hs_sync

#define check_sum_err_hs_sync   7

Definition at line 255 of file anx7625.h.

◆ CLK_1MEG_RB

#define CLK_1MEG_RB   6 /* 1MHz clock reset; 0=reset, 0=reset release */

Definition at line 166 of file anx7625.h.

◆ DPCD_DPCD_REV

#define DPCD_DPCD_REV   0x00

Definition at line 303 of file anx7625.h.

◆ DPCD_MAX_LANE_COUNT

#define DPCD_MAX_LANE_COUNT   0x02

Definition at line 305 of file anx7625.h.

◆ DPCD_MAX_LINK_RATE

#define DPCD_MAX_LINK_RATE   0x01

Definition at line 304 of file anx7625.h.

◆ DSC_BIST_DONE

#define DSC_BIST_DONE   1 /* bit[5:1]: 1=DSC MBIST pass */

Definition at line 167 of file anx7625.h.

◆ DSC_EN

#define DSC_EN   0x01 /* 1=DSC enabled, 0=DSC disabled */

Definition at line 168 of file anx7625.h.

◆ FOUR_BLOCK_SIZE

#define FOUR_BLOCK_SIZE   (128*4)

Definition at line 341 of file anx7625.h.

◆ FRQ_COUNT_RB_SEL

#define FRQ_COUNT_RB_SEL   7

Definition at line 281 of file anx7625.h.

◆ H_BLANK_H

#define H_BLANK_H   0x3F

Definition at line 290 of file anx7625.h.

◆ H_BLANK_L

#define H_BLANK_L   0x3E

Definition at line 288 of file anx7625.h.

◆ HORIZONTAL_ACTIVE_PIXELS_H

#define HORIZONTAL_ACTIVE_PIXELS_H   0x1C /* note: bit[7:6] are reserved */

Definition at line 143 of file anx7625.h.

◆ HORIZONTAL_ACTIVE_PIXELS_L

#define HORIZONTAL_ACTIVE_PIXELS_L   0x1B

Definition at line 142 of file anx7625.h.

◆ HORIZONTAL_BACK_PORCH_H

#define HORIZONTAL_BACK_PORCH_H   0x22 /* note: bit[7:4] are reserved */

Definition at line 149 of file anx7625.h.

◆ HORIZONTAL_BACK_PORCH_L

#define HORIZONTAL_BACK_PORCH_L   0x21

Definition at line 148 of file anx7625.h.

◆ HORIZONTAL_FRONT_PORCH_H

#define HORIZONTAL_FRONT_PORCH_H   0x1E /* note: bit[7:4] are reserved */

Definition at line 145 of file anx7625.h.

◆ HORIZONTAL_FRONT_PORCH_L

#define HORIZONTAL_FRONT_PORCH_L   0x1D

Definition at line 144 of file anx7625.h.

◆ HORIZONTAL_SYNC_WIDTH_H

#define HORIZONTAL_SYNC_WIDTH_H   0x20 /* note: bit[7:4] are reserved */

Definition at line 147 of file anx7625.h.

◆ HORIZONTAL_SYNC_WIDTH_L

#define HORIZONTAL_SYNC_WIDTH_L   0x1F

Definition at line 146 of file anx7625.h.

◆ HORIZONTAL_TOTAL_PIXELS_H

#define HORIZONTAL_TOTAL_PIXELS_H   0x1A /* note: bit[7:6] are reserved */

Definition at line 141 of file anx7625.h.

◆ HORIZONTAL_TOTAL_PIXELS_L

#define HORIZONTAL_TOTAL_PIXELS_L   0x19

Definition at line 140 of file anx7625.h.

◆ HPD_STATUS

#define HPD_STATUS   0x80

Definition at line 68 of file anx7625.h.

◆ HPD_STATUS_CHANGE

#define HPD_STATUS_CHANGE   0x80

Definition at line 67 of file anx7625.h.

◆ HS_link_error_clear

#define HS_link_error_clear   7

Definition at line 251 of file anx7625.h.

◆ I2C_ADDR_70_DPTX

#define I2C_ADDR_70_DPTX   0x70

Definition at line 74 of file anx7625.h.

◆ I2C_ADDR_72_DPTX

#define I2C_ADDR_72_DPTX   0x72

Definition at line 130 of file anx7625.h.

◆ I2C_ADDR_7E_FLASH_CONTROLLER

#define I2C_ADDR_7E_FLASH_CONTROLLER   0x7E

Definition at line 155 of file anx7625.h.

◆ I2S_CH_2

#define I2S_CH_2   0x01

Definition at line 333 of file anx7625.h.

◆ I2S_SLAVE_MODE

#define I2S_SLAVE_MODE   0x08

Definition at line 125 of file anx7625.h.

◆ INTERFACE_CHANGE_INT

#define INTERFACE_CHANGE_INT   0x44

Definition at line 66 of file anx7625.h.

◆ INTR_ALERT_1

#define INTR_ALERT_1   0xCC

Definition at line 61 of file anx7625.h.

◆ INTR_RECEIVED_MSG

#define INTR_RECEIVED_MSG   (1<<5)

Definition at line 63 of file anx7625.h.

◆ INTR_SOFTWARE_INT

#define INTR_SOFTWARE_INT   (1<<3)

Definition at line 62 of file anx7625.h.

◆ LOG_TAG

#define LOG_TAG   "anx7625dp"

Definition at line 10 of file anx7625.h.

◆ M_VID_0

#define M_VID_0   0xC0

Definition at line 79 of file anx7625.h.

◆ M_VID_1

#define M_VID_1   0xC1

Definition at line 80 of file anx7625.h.

◆ M_VID_2

#define M_VID_2   0xC2

Definition at line 81 of file anx7625.h.

◆ MAX_DPCD_BUFFER_SIZE

#define MAX_DPCD_BUFFER_SIZE   16

Definition at line 338 of file anx7625.h.

◆ MAX_UNSIGNED_24BIT

#define MAX_UNSIGNED_24BIT   16777215UL

Definition at line 53 of file anx7625.h.

◆ MIPI_ALERT_CLR_0

#define MIPI_ALERT_CLR_0   0x2D

Definition at line 250 of file anx7625.h.

◆ MIPI_ALERT_OUT_0

#define MIPI_ALERT_OUT_0   0x31

Definition at line 254 of file anx7625.h.

◆ MIPI_CLK_DET_DET_BYPASS

#define MIPI_CLK_DET_DET_BYPASS   2

Definition at line 204 of file anx7625.h.

◆ MIPI_CLK_HS_MANUAL_PD_EN

#define MIPI_CLK_HS_MANUAL_PD_EN   3

Definition at line 203 of file anx7625.h.

◆ MIPI_CLK_MISS_CTRL

#define MIPI_CLK_MISS_CTRL   1

Definition at line 205 of file anx7625.h.

◆ MIPI_CLK_RT_MANUAL_PD_EN

#define MIPI_CLK_RT_MANUAL_PD_EN   4

Definition at line 202 of file anx7625.h.

◆ MIPI_DIGITAL_ADJ_1

#define MIPI_DIGITAL_ADJ_1   0x1B

Definition at line 216 of file anx7625.h.

◆ MIPI_DIGITAL_PLL_16

#define MIPI_DIGITAL_PLL_16   0x3B

Definition at line 268 of file anx7625.h.

◆ MIPI_DIGITAL_PLL_18

#define MIPI_DIGITAL_PLL_18   0x3D

Definition at line 280 of file anx7625.h.

◆ MIPI_DIGITAL_PLL_6

#define MIPI_DIGITAL_PLL_6   0x2A

Definition at line 225 of file anx7625.h.

◆ MIPI_DIGITAL_PLL_7

#define MIPI_DIGITAL_PLL_7   0x2B

Definition at line 235 of file anx7625.h.

◆ MIPI_DIGITAL_PLL_8

#define MIPI_DIGITAL_PLL_8   0x33

Definition at line 258 of file anx7625.h.

◆ MIPI_DIGITAL_PLL_9

#define MIPI_DIGITAL_PLL_9   0x34

Definition at line 266 of file anx7625.h.

◆ MIPI_DPI_SELECT

#define MIPI_DPI_SELECT   5

Definition at line 283 of file anx7625.h.

◆ MIPI_EN_LOCK_FRZ

#define MIPI_EN_LOCK_FRZ   3

Definition at line 261 of file anx7625.h.

◆ MIPI_FREF_D_IND

#define MIPI_FREF_D_IND   1

Definition at line 275 of file anx7625.h.

◆ MIPI_FRQ_COUNTER_RST

#define MIPI_FRQ_COUNTER_RST   2

Definition at line 262 of file anx7625.h.

◆ MIPI_FRQ_FORCE_NDET

#define MIPI_FRQ_FORCE_NDET   0

Definition at line 248 of file anx7625.h.

◆ MIPI_FRQ_FREEZE_NDET

#define MIPI_FRQ_FREEZE_NDET   7

Definition at line 269 of file anx7625.h.

◆ MIPI_FRQ_REG_SET_ENABLE

#define MIPI_FRQ_REG_SET_ENABLE   6

Definition at line 270 of file anx7625.h.

◆ MIPI_FRQ_SET_REG_8

#define MIPI_FRQ_SET_REG_8   1

Definition at line 263 of file anx7625.h.

◆ MIPI_HS_PWD_CLK

#define MIPI_HS_PWD_CLK   7

Definition at line 199 of file anx7625.h.

◆ MIPI_HS_RT_CLK

#define MIPI_HS_RT_CLK   6

Definition at line 200 of file anx7625.h.

◆ MIPI_LANE_CTRL_0

#define MIPI_LANE_CTRL_0   0x05

Definition at line 208 of file anx7625.h.

◆ MIPI_LANE_CTRL_10

#define MIPI_LANE_CTRL_10   0x0F

Definition at line 215 of file anx7625.h.

◆ MIPI_M_NUM_READY

#define MIPI_M_NUM_READY   0x10

Definition at line 228 of file anx7625.h.

◆ MIPI_N_NUM_READY

#define MIPI_N_NUM_READY   0x08

Definition at line 229 of file anx7625.h.

◆ MIPI_PD_CLK

#define MIPI_PD_CLK   5

Definition at line 201 of file anx7625.h.

◆ MIPI_PD_LPTX_CH_MANUAL_PD_EN

#define MIPI_PD_LPTX_CH_MANUAL_PD_EN   0

Definition at line 206 of file anx7625.h.

◆ MIPI_PHY_CONTROL_3

#define MIPI_PHY_CONTROL_3   0x03

Definition at line 198 of file anx7625.h.

◆ MIPI_PLL_FORCE_BAND_EN

#define MIPI_PLL_FORCE_BAND_EN   6

Definition at line 237 of file anx7625.h.

◆ MIPI_PLL_FORCE_N_EN

#define MIPI_PLL_FORCE_N_EN   7

Definition at line 236 of file anx7625.h.

◆ MIPI_PLL_M_NUM_15_8

#define MIPI_PLL_M_NUM_15_8   0x1F

Definition at line 219 of file anx7625.h.

◆ MIPI_PLL_M_NUM_23_16

#define MIPI_PLL_M_NUM_23_16   0x1E

Definition at line 218 of file anx7625.h.

◆ MIPI_PLL_M_NUM_7_0

#define MIPI_PLL_M_NUM_7_0   0x20

Definition at line 220 of file anx7625.h.

◆ MIPI_PLL_N_NUM_15_8

#define MIPI_PLL_N_NUM_15_8   0x22

Definition at line 222 of file anx7625.h.

◆ MIPI_PLL_N_NUM_23_16

#define MIPI_PLL_N_NUM_23_16   0x21

Definition at line 221 of file anx7625.h.

◆ MIPI_PLL_N_NUM_7_0

#define MIPI_PLL_N_NUM_7_0   0x23

Definition at line 223 of file anx7625.h.

◆ MIPI_PLL_PLL_LDO_BIT

#define MIPI_PLL_PLL_LDO_BIT   2

Definition at line 244 of file anx7625.h.

◆ MIPI_PLL_RESET_N

#define MIPI_PLL_RESET_N   0x02

Definition at line 247 of file anx7625.h.

◆ MIPI_PLL_TEST_BIT

#define MIPI_PLL_TEST_BIT   0

Definition at line 231 of file anx7625.h.

◆ MIPI_PLL_VCO_TUNE_REG

#define MIPI_PLL_VCO_TUNE_REG   4

Definition at line 239 of file anx7625.h.

◆ MIPI_PLL_VCO_TUNE_REG_VAL

#define MIPI_PLL_VCO_TUNE_REG_VAL   0x30

Definition at line 242 of file anx7625.h.

◆ MIPI_POST_DIV_VAL

#define MIPI_POST_DIV_VAL   4

Definition at line 259 of file anx7625.h.

◆ MIPI_REG_FORCE_PRE_DIV_EN

#define MIPI_REG_FORCE_PRE_DIV_EN   3

Definition at line 273 of file anx7625.h.

◆ MIPI_REG_FORCE_SEL_EN

#define MIPI_REG_FORCE_SEL_EN   5

Definition at line 271 of file anx7625.h.

◆ MIPI_REG_PLL_PLL_TEST_ENABLE

#define MIPI_REG_PLL_PLL_TEST_ENABLE   0

Definition at line 278 of file anx7625.h.

◆ MIPI_REG_SEL_DIV_REG

#define MIPI_REG_SEL_DIV_REG   4

Definition at line 272 of file anx7625.h.

◆ MIPI_SWAP

#define MIPI_SWAP   0x4A

Definition at line 292 of file anx7625.h.

◆ MIPI_SWAP_CH0

#define MIPI_SWAP_CH0   7

Definition at line 293 of file anx7625.h.

◆ MIPI_SWAP_CH1

#define MIPI_SWAP_CH1   6

Definition at line 294 of file anx7625.h.

◆ MIPI_SWAP_CH2

#define MIPI_SWAP_CH2   5

Definition at line 295 of file anx7625.h.

◆ MIPI_SWAP_CH3

#define MIPI_SWAP_CH3   4

Definition at line 296 of file anx7625.h.

◆ MIPI_SWAP_CLK

#define MIPI_SWAP_CLK   3

Definition at line 297 of file anx7625.h.

◆ MIPI_TIME_HS_PRPR

#define MIPI_TIME_HS_PRPR   0x08

Definition at line 209 of file anx7625.h.

◆ MIPI_VIDEO_STABLE_CNT

#define MIPI_VIDEO_STABLE_CNT   0x0A

Definition at line 213 of file anx7625.h.

◆ N_VID_0

#define N_VID_0   0xC3

Definition at line 82 of file anx7625.h.

◆ N_VID_1

#define N_VID_1   0xC4

Definition at line 83 of file anx7625.h.

◆ N_VID_2

#define N_VID_2   0xC5

Definition at line 84 of file anx7625.h.

◆ OCM_FW_REVERSION

#define OCM_FW_REVERSION   0x32

Definition at line 171 of file anx7625.h.

◆ OCM_FW_VERSION

#define OCM_FW_VERSION   0x31

Definition at line 170 of file anx7625.h.

◆ OCM_LOADING_TIME

#define OCM_LOADING_TIME   10

Definition at line 16 of file anx7625.h.

◆ ONE_BLOCK_SIZE

#define ONE_BLOCK_SIZE   128

Definition at line 340 of file anx7625.h.

◆ PIXEL_CLOCK_H

#define PIXEL_CLOCK_H   0x26

Definition at line 184 of file anx7625.h.

◆ PIXEL_CLOCK_L

#define PIXEL_CLOCK_L   0x25

Definition at line 183 of file anx7625.h.

◆ PLL_OUT_FREQ_ABS_MAX

#define PLL_OUT_FREQ_ABS_MAX   800000000UL

Definition at line 52 of file anx7625.h.

◆ PLL_OUT_FREQ_ABS_MIN

#define PLL_OUT_FREQ_ABS_MIN   300000000UL

Definition at line 51 of file anx7625.h.

◆ PLL_OUT_FREQ_MAX

#define PLL_OUT_FREQ_MAX   730000000UL

Definition at line 50 of file anx7625.h.

◆ PLL_OUT_FREQ_MIN

#define PLL_OUT_FREQ_MIN   520000000UL

Definition at line 49 of file anx7625.h.

◆ POST_DIVIDER_MAX

#define POST_DIVIDER_MAX   16

Definition at line 48 of file anx7625.h.

◆ POST_DIVIDER_MIN

#define POST_DIVIDER_MIN   1

Definition at line 47 of file anx7625.h.

◆ PRODUCT_ID_H

#define PRODUCT_ID_H   0x03

Definition at line 59 of file anx7625.h.

◆ PRODUCT_ID_L

#define PRODUCT_ID_L   0x02

Definition at line 58 of file anx7625.h.

◆ R_DSC_CTRL_0

#define R_DSC_CTRL_0   0x40

Definition at line 164 of file anx7625.h.

◆ READ_STATUS_EN

#define READ_STATUS_EN   7

Definition at line 165 of file anx7625.h.

◆ REF_CLK_19200kHz

#define REF_CLK_19200kHz   0

Definition at line 277 of file anx7625.h.

◆ REF_CLK_27000kHz

#define REF_CLK_27000kHz   1

Definition at line 276 of file anx7625.h.

◆ REG_BAUD_DIV_RATIO

#define REG_BAUD_DIV_RATIO   0

Definition at line 286 of file anx7625.h.

◆ REG_FORCE_POST_DIV_EN

#define REG_FORCE_POST_DIV_EN   6

Definition at line 282 of file anx7625.h.

◆ RST_CTRL2

#define RST_CTRL2   0x07

Definition at line 89 of file anx7625.h.

◆ RSVD_00_ADDR

#define RSVD_00_ADDR   0x00

Definition at line 38 of file anx7625.h.

◆ RSVD_39_ADDR

#define RSVD_39_ADDR   0x39

Definition at line 41 of file anx7625.h.

◆ RSVD_60_ADDR

#define RSVD_60_ADDR   0x60

Definition at line 40 of file anx7625.h.

◆ RSVD_7F_ADDR

#define RSVD_7F_ADDR   0x7F

Definition at line 42 of file anx7625.h.

◆ RSVD_D1_ADDR

#define RSVD_D1_ADDR   0xD1

Definition at line 39 of file anx7625.h.

◆ RX_P0_ADDR

#define RX_P0_ADDR   0x3F

Definition at line 24 of file anx7625.h.

◆ RX_P1_ADDR

#define RX_P1_ADDR   0x42

Definition at line 25 of file anx7625.h.

◆ RX_P2_ADDR

#define RX_P2_ADDR   0x2A

Definition at line 26 of file anx7625.h.

◆ SELECT_DPI

#define SELECT_DPI   0

Definition at line 285 of file anx7625.h.

◆ SELECT_DSI

#define SELECT_DSI   1

Definition at line 284 of file anx7625.h.

◆ SP_TX_ACT_LINE_STA_H

#define SP_TX_ACT_LINE_STA_H   0x27

Definition at line 94 of file anx7625.h.

◆ SP_TX_ACT_LINE_STA_L

#define SP_TX_ACT_LINE_STA_L   0x26

Definition at line 93 of file anx7625.h.

◆ SP_TX_ACT_PIXEL_STA_H

#define SP_TX_ACT_PIXEL_STA_H   0x2E

Definition at line 101 of file anx7625.h.

◆ SP_TX_ACT_PIXEL_STA_L

#define SP_TX_ACT_PIXEL_STA_L   0x2D

Definition at line 100 of file anx7625.h.

◆ SP_TX_BPC_10

#define SP_TX_BPC_10   0x40

Definition at line 113 of file anx7625.h.

◆ SP_TX_BPC_12

#define SP_TX_BPC_12   0x60

Definition at line 114 of file anx7625.h.

◆ SP_TX_BPC_6

#define SP_TX_BPC_6   0x00

Definition at line 111 of file anx7625.h.

◆ SP_TX_BPC_8

#define SP_TX_BPC_8   0x20

Definition at line 112 of file anx7625.h.

◆ SP_TX_BPC_MASK

#define SP_TX_BPC_MASK   0xE0

Definition at line 110 of file anx7625.h.

◆ SP_TX_H_B_PORCH_STA_H

#define SP_TX_H_B_PORCH_STA_H   0x34

Definition at line 107 of file anx7625.h.

◆ SP_TX_H_B_PORCH_STA_L

#define SP_TX_H_B_PORCH_STA_L   0x33

Definition at line 106 of file anx7625.h.

◆ SP_TX_H_F_PORCH_STA_H

#define SP_TX_H_F_PORCH_STA_H   0x30

Definition at line 103 of file anx7625.h.

◆ SP_TX_H_F_PORCH_STA_L

#define SP_TX_H_F_PORCH_STA_L   0x2F

Definition at line 102 of file anx7625.h.

◆ SP_TX_H_SYNC_STA_H

#define SP_TX_H_SYNC_STA_H   0x32

Definition at line 105 of file anx7625.h.

◆ SP_TX_H_SYNC_STA_L

#define SP_TX_H_SYNC_STA_L   0x31

Definition at line 104 of file anx7625.h.

◆ SP_TX_LANE_COUNT_SET_REG

#define SP_TX_LANE_COUNT_SET_REG   0xA1

Definition at line 77 of file anx7625.h.

◆ SP_TX_LINK_BW_SET_REG

#define SP_TX_LINK_BW_SET_REG   0xA0

Definition at line 76 of file anx7625.h.

◆ SP_TX_TOTAL_LINE_STA_H

#define SP_TX_TOTAL_LINE_STA_H   0x25

Definition at line 92 of file anx7625.h.

◆ SP_TX_TOTAL_LINE_STA_L

#define SP_TX_TOTAL_LINE_STA_L   0x24

Definition at line 91 of file anx7625.h.

◆ SP_TX_TOTAL_PIXEL_STA_H

#define SP_TX_TOTAL_PIXEL_STA_H   0x2C

Definition at line 99 of file anx7625.h.

◆ SP_TX_TOTAL_PIXEL_STA_L

#define SP_TX_TOTAL_PIXEL_STA_L   0x2B

Definition at line 98 of file anx7625.h.

◆ SP_TX_V_B_PORCH_STA

#define SP_TX_V_B_PORCH_STA   0x2A

Definition at line 97 of file anx7625.h.

◆ SP_TX_V_F_PORCH_STA

#define SP_TX_V_F_PORCH_STA   0x28

Definition at line 95 of file anx7625.h.

◆ SP_TX_V_SYNC_STA

#define SP_TX_V_SYNC_STA   0x29

Definition at line 96 of file anx7625.h.

◆ SP_TX_VID_CTRL

#define SP_TX_VID_CTRL   0x84

Definition at line 109 of file anx7625.h.

◆ STABLE_INTEGER_CNT_EN

#define STABLE_INTEGER_CNT_EN   0x04

Definition at line 230 of file anx7625.h.

◆ SYSTEM_STSTUS

#define SYSTEM_STSTUS   0x45

Definition at line 65 of file anx7625.h.

◆ TCPC_INTERFACE_ADDR

#define TCPC_INTERFACE_ADDR   0x2C

Definition at line 27 of file anx7625.h.

◆ TDM_CH_4

#define TDM_CH_4   0x03

Definition at line 334 of file anx7625.h.

◆ TDM_CH_6

#define TDM_CH_6   0x05

Definition at line 335 of file anx7625.h.

◆ TDM_CH_8

#define TDM_CH_8   0x07

Definition at line 336 of file anx7625.h.

◆ TDM_SLAVE_MODE

#define TDM_SLAVE_MODE   0x10

Definition at line 124 of file anx7625.h.

◆ TDM_TIMING_MODE

#define TDM_TIMING_MODE   0x08

Definition at line 128 of file anx7625.h.

◆ TX_P0_ADDR

#define TX_P0_ADDR   0x38

Definition at line 21 of file anx7625.h.

◆ TX_P1_ADDR

#define TX_P1_ADDR   0x3D

Definition at line 22 of file anx7625.h.

◆ TX_P2_ADDR

#define TX_P2_ADDR   0x39

Definition at line 23 of file anx7625.h.

◆ VERTICAL_BACK_PORCH

#define VERTICAL_BACK_PORCH   0x18

Definition at line 138 of file anx7625.h.

◆ VERTICAL_FRONT_PORCH

#define VERTICAL_FRONT_PORCH   0x16

Definition at line 136 of file anx7625.h.

◆ VERTICAL_SYNC_WIDTH

#define VERTICAL_SYNC_WIDTH   0x17

Definition at line 137 of file anx7625.h.

◆ VIDEO_BIT_MATRIX_12

#define VIDEO_BIT_MATRIX_12   0x4c

Definition at line 116 of file anx7625.h.

◆ VIDEO_CONTROL_0

#define VIDEO_CONTROL_0   0x08

Definition at line 132 of file anx7625.h.

◆ XTAL_FRQ

#define XTAL_FRQ   (27*1000000)

Definition at line 45 of file anx7625.h.

◆ XTAL_FRQ_19M2

#define XTAL_FRQ_19M2   (0 << XTAL_FRQ_SEL_POS)

Definition at line 161 of file anx7625.h.

◆ XTAL_FRQ_27M

#define XTAL_FRQ_27M   (4 << XTAL_FRQ_SEL_POS)

Definition at line 162 of file anx7625.h.

◆ XTAL_FRQ_SEL

#define XTAL_FRQ_SEL   0x3F

Definition at line 157 of file anx7625.h.

◆ XTAL_FRQ_SEL_POS

#define XTAL_FRQ_SEL_POS   5

Definition at line 159 of file anx7625.h.

Enumeration Type Documentation

◆ AudioFs

enum AudioFs
Enumerator
AUDIO_FS_441K 
AUDIO_FS_48K 
AUDIO_FS_32K 
AUDIO_FS_882K 
AUDIO_FS_96K 
AUDIO_FS_1764K 
AUDIO_FS_192K 

Definition at line 310 of file anx7625.h.

◆ AudioWdLen

enum AudioWdLen
Enumerator
AUDIO_W_LEN_16_20MAX 
AUDIO_W_LEN_18_20MAX 
AUDIO_W_LEN_17_20MAX 
AUDIO_W_LEN_19_20MAX 
AUDIO_W_LEN_20_20MAX 
AUDIO_W_LEN_20_24MAX 
AUDIO_W_LEN_22_24MAX 
AUDIO_W_LEN_21_24MAX 
AUDIO_W_LEN_23_24MAX 
AUDIO_W_LEN_24_24MAX 

Definition at line 320 of file anx7625.h.

Function Documentation

◆ anx7625_dp_get_edid()

int anx7625_dp_get_edid ( uint8_t  bus,
struct edid out 
)

Definition at line 845 of file anx7625.c.

References ANXERROR, decode_edid(), EDID_CONFORMANT, FOUR_BLOCK_SIZE, ONE_BLOCK_SIZE, and sp_tx_edid_read().

Referenced by bridge_anx7625_get_edid(), configure_display(), and get_panel_description().

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◆ anx7625_dp_start()

int anx7625_dp_start ( uint8_t  bus,
const struct edid edid 
)

Definition at line 828 of file anx7625.c.

References anx7625_dsi_config(), anx7625_parse_edid(), ANXERROR, and ANXINFO.

Referenced by bridge_anx7625_post_power_on(), and configure_display().

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◆ anx7625_init()

int anx7625_init ( uint8_t  bus)

Definition at line 866 of file anx7625.c.

References anx7625_hpd_change_detect(), anx7625_power_on_init(), ANXERROR, mdelay(), and retry.

Referenced by bridge_anx7625_get_edid(), configure_display(), and get_panel_description().

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