coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
scp.c
Go to the documentation of this file.
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <
device/mmio.h
>
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#include <
soc/scp.h
>
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void
scp_rsi_enable
(
void
)
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{
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u32
val
;
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for
(
val
=
SCP_SRAM_PDN_DISABLE_VAL
;
val
!= 0U;) {
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val
=
val
>> 1;
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write32
(
REG_L1TCM_SRAM_PDN
,
val
);
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}
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}
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void
scp_rsi_disable
(
void
)
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{
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write32
(
REG_L1TCM_SRAM_PDN
,
SCP_SRAM_PDN_DISABLE_VAL
);
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}
write32
static void write32(void *addr, uint32_t val)
Definition:
mmio.h:40
mmio.h
scp_rsi_enable
void scp_rsi_enable(void)
Definition:
scp.c:6
scp_rsi_disable
void scp_rsi_disable(void)
Definition:
scp.c:16
scp.h
REG_L1TCM_SRAM_PDN
#define REG_L1TCM_SRAM_PDN
Definition:
scp.h:10
SCP_SRAM_PDN_DISABLE_VAL
#define SCP_SRAM_PDN_DISABLE_VAL
Definition:
scp.h:8
u32
uint32_t u32
Definition:
stdint.h:51
val
u8 val
Definition:
sys.c:300
src
soc
mediatek
mt8195
scp.c
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