coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
ramstage.c
Go to the documentation of this file.
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <device/device.h>
4 #include <soc/ramstage.h>
5 #include <variant/gpio.h>
6 #include <variant/ramstage.h>
7 
9 {
11 }
12 
13 static void init_mainboard(void *chip_info)
14 {
16 }
17 
20 };
static struct sdram_info params
Definition: sdram_configs.c:83
__weak void mainboard_silicon_init_params(SILICON_INIT_UPD *params)
Definition: ramstage.c:162
#define FSP_S_CONFIG
Definition: fsp_upd.h:9
void variant_configure_gpios(void)
Definition: gpio.c:238
struct chip_operations mainboard_ops
Definition: ramstage.c:11
static void init_mainboard(void *chip_info)
Definition: ramstage.c:13
void variant_configure_fsps(FSP_S_CONFIG *params)
Definition: ramstage.c:6
void(* init)(void *chip_info)
Definition: device.h:25