coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
ramstage.c
Go to the documentation of this file.
1
/* SPDX-License-Identifier: GPL-2.0-only */
2
3
#include <
device/device.h
>
4
#include <soc/ramstage.h>
5
#include <variant/gpio.h>
6
#include <
variant/ramstage.h
>
7
8
void
mainboard_silicon_init_params
(
FSP_S_CONFIG
*
params
)
9
{
10
variant_configure_fsps
(
params
);
11
}
12
13
static
void
init_mainboard
(
void
*chip_info)
14
{
15
variant_configure_gpios
();
16
}
17
18
struct
chip_operations
mainboard_ops
= {
19
.
init
=
init_mainboard
,
20
};
params
static struct sdram_info params
Definition:
sdram_configs.c:83
mainboard_silicon_init_params
__weak void mainboard_silicon_init_params(SILICON_INIT_UPD *params)
Definition:
ramstage.c:162
FSP_S_CONFIG
#define FSP_S_CONFIG
Definition:
fsp_upd.h:9
device.h
variant_configure_gpios
void variant_configure_gpios(void)
Definition:
gpio.c:238
mainboard_ops
struct chip_operations mainboard_ops
Definition:
ramstage.c:11
ramstage.h
init_mainboard
static void init_mainboard(void *chip_info)
Definition:
ramstage.c:13
variant_configure_fsps
void variant_configure_fsps(FSP_S_CONFIG *params)
Definition:
ramstage.c:6
chip_operations
Definition:
device.h:23
chip_operations::init
void(* init)(void *chip_info)
Definition:
device.h:25
src
mainboard
clevo
tgl-u
ramstage.c
Generated by
1.9.1