coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
uart.c File Reference
#include <console/console.h>
#include <commonlib/helpers.h>
#include <device/device.h>
#include <device/mmio.h>
#include <amdblocks/gpio.h>
#include <amdblocks/aoac.h>
#include <amdblocks/uart.h>
#include <soc/aoac_defs.h>
#include <soc/southbridge.h>
#include <soc/gpio.h>
#include <soc/uart.h>
#include <types.h>
Include dependency graph for uart.c:

Go to the source code of this file.

Functions

uintptr_t get_uart_base (unsigned int idx)
 
void clear_uart_legacy_config (void)
 
void set_uart_config (unsigned int idx)
 
static const char * uart_acpi_name (const struct device *dev)
 
static void uart_enable (struct device *dev)
 
static void uart_read_resources (struct device *dev)
 

Variables

struct {
   uintptr_t   base
 
   struct soc_amd_gpio   mux [2]
 
uart_info []
 
struct device_operations picasso_uart_mmio_ops
 

Function Documentation

◆ clear_uart_legacy_config()

void clear_uart_legacy_config ( void  )

Definition at line 46 of file uart.c.

References FCH_LEGACY_UART_DECODE, and write16().

Here is the call graph for this function:

◆ get_uart_base()

uintptr_t get_uart_base ( unsigned int  idx)

Definition at line 38 of file uart.c.

References ARRAY_SIZE, and uart_info.

◆ set_uart_config()

void set_uart_config ( unsigned int  idx)

Definition at line 51 of file uart.c.

References ARRAY_SIZE, gpio_configure_pads(), and uart_info.

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◆ uart_acpi_name()

static const char* uart_acpi_name ( const struct device dev)
static

Definition at line 59 of file uart.c.

References mmio_path::addr, APU_UART0_BASE, APU_UART1_BASE, device_path::mmio, NULL, and device::path.

◆ uart_enable()

◆ uart_read_resources()

static void uart_read_resources ( struct device dev)
static

Definition at line 106 of file uart.c.

Variable Documentation

◆ base

uintptr_t base

Definition at line 17 of file uart.c.

◆ mux

struct soc_amd_gpio mux[2]

Definition at line 17 of file uart.c.

◆ picasso_uart_mmio_ops

struct device_operations picasso_uart_mmio_ops
Initial value:
= {
.read_resources = uart_read_resources,
.set_resources = noop_set_resources,
.scan_bus = scan_static_bus,
.acpi_name = uart_acpi_name,
.enable = uart_enable,
.acpi_fill_ssdt = uart_inject_ssdt,
}
static void noop_set_resources(struct device *dev)
Definition: device.h:74
void scan_static_bus(struct device *bus)
Definition: root_device.c:89
void uart_inject_ssdt(const struct device *dev)
Definition: uart_acpi.c:8
static void uart_enable(struct device *dev)
Definition: uart.c:76
static void uart_read_resources(struct device *dev)
Definition: uart.c:106
static const char * uart_acpi_name(const struct device *dev)
Definition: uart.c:59

Definition at line 106 of file uart.c.

Referenced by set_mmio_dev_ops().

◆ 

const { ... } uart_info[]
Initial value:
= {
[0] = { APU_UART0_BASE, {
PAD_NF(GPIO_138, UART0_TXD, PULL_NONE),
PAD_NF(GPIO_136, UART0_RXD, PULL_NONE),
} },
[1] = { APU_UART1_BASE, {
PAD_NF(GPIO_143, UART1_TXD, PULL_NONE),
PAD_NF(GPIO_141, UART1_RXD, PULL_NONE),
} },
[2] = { APU_UART2_BASE, {
PAD_NF(GPIO_137, UART2_TXD, PULL_NONE),
PAD_NF(GPIO_135, UART2_RXD, PULL_NONE),
} },
[3] = { APU_UART3_BASE, {
PAD_NF(GPIO_140, UART3_TXD, PULL_NONE),
PAD_NF(GPIO_142, UART3_RXD, PULL_NONE),
} },
}
#define APU_UART0_BASE
Definition: iomap.h:19
#define APU_UART1_BASE
Definition: iomap.h:20
#define PULL_NONE
Definition: buildOpts.c:72
#define GPIO_143
Definition: gpio.h:90
#define GPIO_141
Definition: gpio.h:88
#define GPIO_140
Definition: gpio.h:87
#define GPIO_142
Definition: gpio.h:89
#define PAD_NF(pin, func, pull)
Definition: gpio_defs.h:208
#define GPIO_136
Definition: gpio.h:91
#define GPIO_137
Definition: gpio.h:92
#define GPIO_138
Definition: gpio.h:93
#define GPIO_135
Definition: gpio.h:90

Referenced by get_uart_base(), and set_uart_config().