coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
early_mmc.c File Reference
#include <acpi/acpi.h>
#include <cbmem.h>
#include <commonlib/storage/sd_mmc.h>
#include <commonlib/sd_mmc_ctrlr.h>
#include <commonlib/sdhci.h>
#include <compiler.h>
#include <console/console.h>
#include <device/pci.h>
#include <intelblocks/mmc.h>
#include <soc/iomap.h>
#include <soc/pci_devs.h>
#include <string.h>
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Functions

void soc_sd_mmc_controller_quirks (struct sd_mmc_ctrlr *ctrlr)
 
static void enable_mmc_controller_bar (void)
 
static void disable_mmc_controller_bar (void)
 
static void set_early_mmc_wake_status (int32_t status)
 
int early_mmc_wake_hw (void)
 

Function Documentation

◆ disable_mmc_controller_bar()

static void disable_mmc_controller_bar ( void  )
static

Definition at line 38 of file early_mmc.c.

References PCH_DEV_EMMC, PCI_BASE_ADDRESS_0, PCI_COMMAND, PCI_COMMAND_MASTER, PCI_COMMAND_MEMORY, pci_write_config16(), and pci_write_config32().

Referenced by early_mmc_wake_hw().

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◆ early_mmc_wake_hw()

◆ enable_mmc_controller_bar()

static void enable_mmc_controller_bar ( void  )
static

Definition at line 30 of file early_mmc.c.

References PCH_DEV_EMMC, PCI_BASE_ADDRESS_0, PCI_COMMAND, PCI_COMMAND_MASTER, PCI_COMMAND_MEMORY, pci_write_config16(), and pci_write_config32().

Referenced by early_mmc_wake_hw().

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◆ set_early_mmc_wake_status()

static void set_early_mmc_wake_status ( int32_t  status)
static

Definition at line 45 of file early_mmc.c.

References BIOS_ERR, cbmem_add(), CBMEM_ID_MMC_STATUS, NULL, and printk.

Referenced by early_mmc_wake_hw().

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◆ soc_sd_mmc_controller_quirks()

void soc_sd_mmc_controller_quirks ( struct sd_mmc_ctrlr ctrlr)

Definition at line 16 of file early_mmc.c.

References BIOS_ERR, sd_mmc_ctrlr::f_max, sd_mmc_ctrlr::f_min, printk, and soc_get_mmc_frequencies().

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