coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
ramstage.c
Go to the documentation of this file.
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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#include <baseboard/variants.h>
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#include <
fw_config.h
>
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#include <soc/soc_chip.h>
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static
void
ext_vr_update
(
void
)
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{
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struct
soc_intel_jasperlake_config
*cfg =
config_of_soc
();
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if
(
fw_config_probe
(
FW_CONFIG
(EXT_VR, EXT_VR_ABSENT)))
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cfg->
disable_external_bypass_vr
= 1;
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}
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void
variant_devtree_update
(
void
)
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{
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ext_vr_update
();
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}
fw_config.h
FW_CONFIG
#define FW_CONFIG(__field, __option)
Definition:
fw_config.h:28
config_of_soc
#define config_of_soc()
Definition:
device.h:394
fw_config_probe
bool fw_config_probe(const struct fw_config *match)
Definition:
fw_config.c:62
variant_devtree_update
void variant_devtree_update(void)
Definition:
ramstage.c:63
ext_vr_update
static void ext_vr_update(void)
Definition:
ramstage.c:7
soc_intel_jasperlake_config
Definition:
chip.h:26
soc_intel_jasperlake_config::disable_external_bypass_vr
bool disable_external_bypass_vr
Definition:
chip.h:402
src
mainboard
google
dedede
variants
kracko
ramstage.c
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