coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
romstage.c
Go to the documentation of this file.
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <
cbmem.h
>
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#include <
console/console.h
>
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#include <
console/streams.h
>
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#include <
console/uart.h
>
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#include <
program_loading.h
>
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#include <soc/clock.h>
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#include <soc/sdram.h>
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void
main
(
void
)
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{
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console_init
();
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/* TODO: Follow Section 6.3 (FSBL) of the FU540 manual */
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clock_init
();
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// re-initialize UART
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if
(
CONFIG
(CONSOLE_SERIAL))
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uart_init
(CONFIG_UART_FOR_CONSOLE);
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sdram_init
();
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cbmem_initialize_empty
();
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run_ramstage
();
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}
main
void main(void)
Definition:
romstage.c:13
sdram_init
void sdram_init(void)
Definition:
sdram.c:16
cbmem.h
cbmem_initialize_empty
void cbmem_initialize_empty(void)
Definition:
imd_cbmem.c:45
console.h
CONFIG
@ CONFIG
Definition:
dsi_common.h:201
uart.h
console_init
void console_init(void)
Definition:
init.c:49
uart_init
void uart_init(unsigned int idx)
Definition:
pl011.c:8
program_loading.h
run_ramstage
void run_ramstage(void)
Definition:
prog_loaders.c:85
clock_init
void clock_init(void)
Definition:
clock.c:539
streams.h
src
mainboard
sifive
hifive-unleashed
romstage.c
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