coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
refcode_native.c File Reference
#include <device/mmio.h>
#include <console/console.h>
#include <cpu/x86/tsc.h>
#include <device/pci.h>
#include <delay.h>
#include <soc/pci_devs.h>
#include <soc/lpc.h>
#include <soc/iosf.h>
#include <soc/iomap.h>
#include <soc/ramstage.h>
#include <soc/modphy_table.h>
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Macros

#define IOSF_READ(op_read, port)    (IOSF_OPCODE(op_read) | IOSF_PORT(port))
 
#define IOSF_WRITE(op_write, port)    (IOSF_OPCODE(op_write) | IOSF_PORT(port))
 
#define BUNIT_BALIMIT0   0x0b
 
#define AUNIT_AVCCTL   0x21
 
#define AUNIT_ACFCACV   0x60
 
#define CUNIT_ACCESS_CTRL_VIOL   0x41
 
#define CUINT_SSA_REGIONAL_TRUNKGATE_CTL   0x43
 
#define TUNIT_CTL   0x03
 
#define TUNIT_MISC_CTL   0x04
 
#define R_PCH_PMC_MTPMC1   0xb0
 

Functions

static void program_modphy_table (struct modphy_entry *table)
 
static void gpio_sc_sdcard_workaround (void)
 
static void ssa_safe_config (void)
 
void baytrail_run_reference_code (void)
 

Macro Definition Documentation

◆ AUNIT_ACFCACV

#define AUNIT_ACFCACV   0x60

Definition at line 52 of file refcode_native.c.

◆ AUNIT_AVCCTL

#define AUNIT_AVCCTL   0x21

Definition at line 51 of file refcode_native.c.

◆ BUNIT_BALIMIT0

#define BUNIT_BALIMIT0   0x0b

Definition at line 50 of file refcode_native.c.

◆ CUINT_SSA_REGIONAL_TRUNKGATE_CTL

#define CUINT_SSA_REGIONAL_TRUNKGATE_CTL   0x43

Definition at line 54 of file refcode_native.c.

◆ CUNIT_ACCESS_CTRL_VIOL

#define CUNIT_ACCESS_CTRL_VIOL   0x41

Definition at line 53 of file refcode_native.c.

◆ IOSF_READ

#define IOSF_READ (   op_read,
  port 
)     (IOSF_OPCODE(op_read) | IOSF_PORT(port))

Definition at line 15 of file refcode_native.c.

◆ IOSF_WRITE

#define IOSF_WRITE (   op_write,
  port 
)     (IOSF_OPCODE(op_write) | IOSF_PORT(port))

Definition at line 17 of file refcode_native.c.

◆ R_PCH_PMC_MTPMC1

#define R_PCH_PMC_MTPMC1   0xb0

Definition at line 83 of file refcode_native.c.

◆ TUNIT_CTL

#define TUNIT_CTL   0x03

Definition at line 55 of file refcode_native.c.

◆ TUNIT_MISC_CTL

#define TUNIT_MISC_CTL   0x04

Definition at line 56 of file refcode_native.c.

Function Documentation

◆ baytrail_run_reference_code()

◆ gpio_sc_sdcard_workaround()

static void gpio_sc_sdcard_workaround ( void  )
static

Definition at line 31 of file refcode_native.c.

References clrbits32, clrsetbits32, IO_BASE_ADDRESS, setbits32, udelay(), and write32().

Referenced by baytrail_run_reference_code().

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◆ program_modphy_table()

static void program_modphy_table ( struct modphy_entry table)
static

Definition at line 20 of file refcode_native.c.

References IOSF_READ, iosf_read_port(), IOSF_WRITE, iosf_write_port(), modphy_entry::mask, modphy_entry::op_read, modphy_entry::op_write, modphy_entry::port, modphy_entry::reg, and modphy_entry::value.

Referenced by baytrail_run_reference_code().

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◆ ssa_safe_config()

static void ssa_safe_config ( void  )
static