coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
raminit_native.h
Go to the documentation of this file.
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/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef RAMINIT_NATIVE_H
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#define RAMINIT_NATIVE_H
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#include "
sandybridge.h
"
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#include <
device/dram/ddr3.h
>
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#include <
stdbool.h
>
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#include <
stdint.h
>
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/* The order is: ch0dimmA, ch0dimmB, ch1dimmA, ch1dimmB */
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void
read_spd
(
spd_raw_data
*spd,
u8
addr
,
bool
id_only);
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void
mainboard_get_spd
(
spd_raw_data
*spd,
bool
id_only);
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#endif
/* RAMINIT_NATIVE_H */
addr
static u32 addr
Definition:
cirrus.c:14
ddr3.h
Utilities for decoding DDR3 SPDs.
spd_raw_data
u8 spd_raw_data[256]
Definition:
ddr3.h:156
mainboard_get_spd
void mainboard_get_spd(spd_raw_data *spd, bool id_only)
Definition:
early_init.c:25
read_spd
void read_spd(spd_raw_data *spd, u8 addr, bool id_only)
Definition:
raminit.c:138
sandybridge.h
stdbool.h
stdint.h
u8
uint8_t u8
Definition:
stdint.h:45
src
northbridge
intel
sandybridge
raminit_native.h
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