coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <types.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <device/mmio.h>
#include <hwilib.h>
#include <bootstate.h>
#include "nc_fpga.h"
Go to the source code of this file.
Macros | |
#define | FPGA_SET_PARAM(src, dst) |
Functions | |
static void | init_temp_mon (void *base_adr) |
static void | init_fan_ctrl (void *base_adr) |
static void | nc_fpga_init (struct device *dev) |
This function is the driver entry point for the init phase of the PCI bus allocator. More... | |
static void | nc_fpga_set_resources (struct device *dev) |
Variables | |
static void * | nc_fpga_bar0 |
static struct device_operations | nc_fpga_ops |
static const unsigned short | nc_fpga_device_ids [] = { 0x4080, 0x4091, 0 } |
static const struct pci_driver nc_fpga_driver | __pci_driver |
#define FPGA_SET_PARAM | ( | src, | |
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Definition at line 52 of file nc_fpga.c.
References FPGA_SET_PARAM, and mask.
Referenced by nc_fpga_init().
Definition at line 23 of file nc_fpga.c.
References FPGA_SET_PARAM, and MAX_NUM_SENSORS.
Referenced by nc_fpga_init().
This function is the driver entry point for the init phase of the PCI bus allocator.
It will initialize all the needed parts of NC_FPGA.
*dev | Pointer to the used PCI device |
Definition at line 87 of file nc_fpga.c.
References CB_SUCCESS, FPGA_SET_PARAM, init_fan_ctrl(), init_temp_mon(), NC_BL_BRIGHTNESS_OFFSET, NC_BL_PWM_OFFSET, NC_CAP1_BL_BRIGHTNESS_CTRL, NC_CAP1_DSAVE_NMI_DELAY, NC_CAP1_FAN_CTRL, NC_CAP1_OFFSET, NC_CAP1_TEMP_MON, NC_DSAVE_OFFSET, NC_FANMON_CTRL_OFFSET, nc_fpga_bar0, NC_FPGA_MAGIC, NC_MAGIC_OFFSET, NULL, PCI_BASE_ADDRESS_0, PCI_BASE_ADDRESS_MEM_ATTR_MASK, PCI_COMMAND, PCI_COMMAND_MEMORY, pci_read_config32(), pci_read_config8(), and read32().
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Definition at line 14 of file nc_fpga.c.
Referenced by nc_fpga_init().
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