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coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ops.h>
#include <intelblocks/lpc_lib.h>
#include <intelblocks/itss.h>
#include <soc/ramstage.h>
#include <soc/interrupt.h>
#include <soc/irq.h>
#include <string.h>
Go to the source code of this file.
Functions | |
void | soc_irq_settings (FSP_SIL_UPD *params) |
Variables | |
static const SI_PCH_DEVICE_INTERRUPT_CONFIG | devintconfig [] |
void soc_irq_settings | ( | FSP_SIL_UPD * | params | ) |
Definition at line 166 of file irq.c.
References ARRAY_SIZE, config, config_of(), devintconfig, GPIO_IRQ14, memcpy(), params, PCH_DEVFN_LPC, PCH_IRQ10, PCH_IRQ11, PCH_MAX_IRQ_CONFIG, PCH_PARC, PCH_PBRC, PCH_PCRC, PCH_PDRC, PCH_PERC, PCH_PFRC, PCH_PGRC, PCH_PHRC, pcidev_path_on_root(), SCI_IRQ9, and TCO_IRQ9.
Referenced by platform_fsp_silicon_init_params_cb().
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static |
Definition at line 13 of file irq.c.
Referenced by soc_irq_settings().