coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
BiosCallOuts.c
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <console/console.h>
4 #include <AGESA.h>
7 #include <FchPlatform.h>
8 #include <spd_bin.h>
9 
10 #include "imc.h"
11 
12 static AGESA_STATUS board_ReadSpd_from_cbfs(UINT32 Func, UINTN Data, VOID *ConfigPtr);
13 
15 {
16  {AGESA_DO_RESET, agesa_Reset },
17  {AGESA_READ_SPD, board_ReadSpd_from_cbfs },
18  {AGESA_READ_SPD_RECOVERY, agesa_NoopUnsupported },
19  {AGESA_RUNFUNC_ONAP, agesa_RunFuncOnAp },
20  {AGESA_GET_IDS_INIT_DATA, agesa_EmptyIdsInitData },
21  {AGESA_HOOKBEFORE_DQS_TRAINING, agesa_NoopSuccess },
22  {AGESA_HOOKBEFORE_EXIT_SELF_REF, agesa_NoopSuccess },
23  {AGESA_GNB_GFX_GET_VBIOS_IMAGE, agesa_GfxGetVbiosImage }
24 };
26 
27 /**
28  * ALC272 Verb Table
29  */
30 const CODEC_ENTRY Alc272_VerbTbl[] = {
31  {0x11, 0x411111F0}, // - SPDIF_OUT2
32  {0x12, 0x411111F0}, // - DMIC_1/2
33  {0x13, 0x411111F0}, // - DMIC_3/4
34  {0x14, 0x411111F0}, // Port D - LOUT1
35  {0x15, 0x01011050}, // Port A - LOUT2 Explorer 2x DAC
36  {0x16, 0x411111F0}, //
37  {0x17, 0x411111F0}, // Port H - MONO
38  {0x18, 0x01a11840}, // Port B - MIC1
39  {0x19, 0x411111F0}, // Port F - MIC2
40  {0x1a, 0x01811030}, // Port C - LINE1
41  {0x1b, 0x01811020}, // Port E - LINE2 Explorer 2x ADC
42  {0x1d, 0x40130605}, // - PCBEEP
43  {0x1e, 0x411111F0}, // - SPDIF_OUT1
44  {0x21, 0x01211010}, // Port I - HPOUT
45  {0xff, 0xffffffff}
46 };
47 
48 static const CODEC_TBL_LIST CodecTableList[] =
49 {
50  {0x10ec0272, (CODEC_ENTRY*)&Alc272_VerbTbl[0]},
51  {(UINT32)0x0FFFFFFFF, (CODEC_ENTRY*)0x0FFFFFFFFUL}
52 };
53 
54 #define FAN_INPUT_INTERNAL_DIODE 0
55 #define FAN_INPUT_TEMP0 1
56 #define FAN_INPUT_TEMP1 2
57 #define FAN_INPUT_TEMP2 3
58 #define FAN_INPUT_TEMP3 4
59 #define FAN_INPUT_TEMP0_FILTER 5
60 #define FAN_INPUT_ZERO 6
61 #define FAN_INPUT_DISABLED 7
62 
63 #define FAN_AUTOMODE (1 << 0)
64 #define FAN_LINEARMODE (1 << 1)
65 #define FAN_STEPMODE ~(1 << 1)
66 #define FAN_POLARITY_HIGH (1 << 2)
67 #define FAN_POLARITY_LOW ~(1 << 2)
68 
69 /* Normally, 4-wire fan runs at 25KHz and 3-wire fan runs at 100Hz */
70 #define FREQ_28KHZ 0x0
71 #define FREQ_25KHZ 0x1
72 #define FREQ_23KHZ 0x2
73 #define FREQ_21KHZ 0x3
74 #define FREQ_29KHZ 0x4
75 #define FREQ_18KHZ 0x5
76 #define FREQ_100HZ 0xF7
77 #define FREQ_87HZ 0xF8
78 #define FREQ_58HZ 0xF9
79 #define FREQ_44HZ 0xFA
80 #define FREQ_35HZ 0xFB
81 #define FREQ_29HZ 0xFC
82 #define FREQ_22HZ 0xFD
83 #define FREQ_14HZ 0xFE
84 #define FREQ_11HZ 0xFF
85 
86 /* Hardware Monitor Fan Control
87  * Hardware limitation:
88  * HWM failed to read the input temperature via I2C,
89  * if other software switches the I2C switch by mistake or intention.
90  * We recommend using IMC to control Fans, instead of HWM.
91  */
92 static void oem_fan_control(FCH_DATA_BLOCK *FchParams)
93 {
94  /* Enable IMC fan control, the recommended way */
95  if (CONFIG(HUDSON_IMC_FWM)) {
96  imc_reg_init();
97 
98  /* HwMonitorEnable = TRUE && HwmFchtsiAutoOpll ==FALSE to call FchECfancontrolservice */
99  FchParams->Hwm.HwMonitorEnable = TRUE;
100  FchParams->Hwm.HwmFchtsiAutoPoll = FALSE;/* 0 disable, 1 enable TSI Auto Polling */
101 
102  FchParams->Imc.ImcEnable = TRUE;
103  FchParams->Hwm.HwmControl = 1; /* 1 IMC, 0 HWM */
104  FchParams->Imc.ImcEnableOverWrite = 1; /* 2 disable IMC, 1 enable IMC, 0 following hw strap setting */
105 
106  LibAmdMemFill(&(FchParams->Imc.EcStruct), 0, sizeof(FCH_EC), FchParams->StdHeader);
107 
108  /* Thermal Zone Parameter */
109  FchParams->Imc.EcStruct.MsgFun81Zone0MsgReg0 = 0x00;
110  FchParams->Imc.EcStruct.MsgFun81Zone0MsgReg1 = 0x00; /* Zone */
111  FchParams->Imc.EcStruct.MsgFun81Zone0MsgReg2 = 0x3d; //BIT0 | BIT2 | BIT5;
112  FchParams->Imc.EcStruct.MsgFun81Zone0MsgReg3 = 0x4e;//6 | BIT3;
113  FchParams->Imc.EcStruct.MsgFun81Zone0MsgReg4 = 0x00;
114  FchParams->Imc.EcStruct.MsgFun81Zone0MsgReg5 = 0x04;
115  FchParams->Imc.EcStruct.MsgFun81Zone0MsgReg6 = 0x9a; /* SMBUS Address for SMBUS based temperature sensor such as SB-TSI and ADM1032 */
116  FchParams->Imc.EcStruct.MsgFun81Zone0MsgReg7 = 0x01;
117  FchParams->Imc.EcStruct.MsgFun81Zone0MsgReg8 = 0x01; /* PWM stepping rate in unit of PWM level percentage */
118  FchParams->Imc.EcStruct.MsgFun81Zone0MsgReg9 = 0x00;
119 
120  /* IMC Fan Policy temperature thresholds */
121  FchParams->Imc.EcStruct.MsgFun83Zone0MsgReg0 = 0x00;
122  FchParams->Imc.EcStruct.MsgFun83Zone0MsgReg1 = 0x00; /* Zone */
123  FchParams->Imc.EcStruct.MsgFun83Zone0MsgReg2 = 50; /*AC0 threshold in Celsius */
124  FchParams->Imc.EcStruct.MsgFun83Zone0MsgReg3 = 45; /*AC1 threshold in Celsius */
125  FchParams->Imc.EcStruct.MsgFun83Zone0MsgReg4 = 40; /*AC2 threshold in Celsius */
126  FchParams->Imc.EcStruct.MsgFun83Zone0MsgReg5 = 0xff; /*AC3 threshold in Celsius, 0xFF is not define */
127  FchParams->Imc.EcStruct.MsgFun83Zone0MsgReg6 = 0xff; /*AC4 threshold in Celsius, 0xFF is not define */
128  FchParams->Imc.EcStruct.MsgFun83Zone0MsgReg7 = 0xff; /*AC5 threshold in Celsius, 0xFF is not define */
129  FchParams->Imc.EcStruct.MsgFun83Zone0MsgReg8 = 0xff; /*AC6 threshold in Celsius, 0xFF is not define */
130  FchParams->Imc.EcStruct.MsgFun83Zone0MsgReg9 = 0xff; /*AC7 lowest threshold in Celsius, 0xFF is not define */
131  FchParams->Imc.EcStruct.MsgFun83Zone0MsgRegA = 0x4b; /*critical threshold* in Celsius, 0xFF is not define */
132  FchParams->Imc.EcStruct.MsgFun83Zone0MsgRegB = 0x00;
133 
134  /* IMC Fan Policy PWM Settings */
135  FchParams->Imc.EcStruct.MsgFun85Zone0MsgReg0 = 0x00;
136  FchParams->Imc.EcStruct.MsgFun85Zone0MsgReg1 = 0x00; /* Zone */
137  FchParams->Imc.EcStruct.MsgFun85Zone0MsgReg2 = 100; /* AL0 percentage */
138  FchParams->Imc.EcStruct.MsgFun85Zone0MsgReg3 = 99; /* AL1 percentage */
139  FchParams->Imc.EcStruct.MsgFun85Zone0MsgReg4 = 98; /* AL2 percentage */
140  FchParams->Imc.EcStruct.MsgFun85Zone0MsgReg5 = 0xff; /* AL3 percentage */
141  FchParams->Imc.EcStruct.MsgFun85Zone0MsgReg6 = 0xff; /* AL4 percentage */
142  FchParams->Imc.EcStruct.MsgFun85Zone0MsgReg7 = 0xff; /* AL5 percentage */
143  FchParams->Imc.EcStruct.MsgFun85Zone0MsgReg8 = 0xff; /* AL6 percentage */
144  FchParams->Imc.EcStruct.MsgFun85Zone0MsgReg9 = 0xff; /* AL7 percentage */
145 
146  FchParams->Imc.EcStruct.IMCFUNSupportBitMap = 0x111;//BIT0 | BIT4 |BIT8;
147 
148  /* NOTE:
149  * FchInitLateHwm will overwrite the EcStruct with EcDefaultMessage,
150  * AGESA puts EcDefaultMessage as global data in ROM, so we can't overwrite it.
151  * So we remove it from AGESA code. Please See FchInitLateHwm.
152  */
153  } else {
154  /* HWM fan control, the way not recommended */
155  FchParams->Imc.ImcEnable = FALSE;
156  FchParams->Hwm.HwMonitorEnable = TRUE;
157  FchParams->Hwm.HwmFchtsiAutoPoll = TRUE;/* 1 enable, 0 disable TSI Auto Polling */
158  }
159 }
160 
161 void board_FCH_InitReset(struct sysinfo *cb_NA, FCH_RESET_DATA_BLOCK *FchParams_reset)
162 {
163 }
164 
165 void board_FCH_InitEnv(struct sysinfo *cb_NA, FCH_DATA_BLOCK *FchParams_env)
166 {
167  /* Azalia Controller OEM Codec Table Pointer */
168  FchParams_env->Azalia.AzaliaOemCodecTablePtr = (CODEC_TBL_LIST *)(&CodecTableList[0]);
169 
170  /* Fan Control */
171  oem_fan_control(FchParams_env);
172 
173  /* sata configuration */
174  /* disable GEN2 limitation */
175  FchParams_env->Sata.SataMode.SataSetMaxGen2 = FALSE;
176 }
177 
178 static AGESA_STATUS board_ReadSpd_from_cbfs(UINT32 Func, UINTN Data, VOID *ConfigPtr)
179 {
180  AGESA_READ_SPD_PARAMS *info = ConfigPtr;
181  u8 index;
182 
183  if (!ENV_ROMSTAGE)
184  return AGESA_UNSUPPORTED;
185 
186  if (CONFIG(BAP_E20_DDR3_1066))
187  index = 1;
188  else /* CONFIG_BAP_E20_DDR3_800 */
189  index = 0;
190 
191  if (info->MemChannelId > 0)
192  return AGESA_UNSUPPORTED;
193  if (info->SocketId != 0)
194  return AGESA_UNSUPPORTED;
195  if (info->DimmId != 0)
196  return AGESA_UNSUPPORTED;
197 
198  /* Read index 0, first SPD_SIZE bytes of spd.bin file. */
199  if (read_ddr3_spd_from_cbfs((u8 *)info->Buffer, index) < 0)
200  die("No SPD data\n");
201 
202  return AGESA_SUCCESS;
203 }
#define AGESA_SUCCESS
Definition: Amd.h:38
unsigned int AGESA_STATUS
Definition: Amd.h:36
#define AGESA_UNSUPPORTED
Definition: Amd.h:41
void imc_reg_init(void)
Definition: imc.c:13
#define ARRAY_SIZE(a)
Definition: helpers.h:12
void __noreturn die(const char *fmt,...)
Definition: die.c:17
AGESA_STATUS agesa_RunFuncOnAp(UINT32 Func, UINTN Data, VOID *ConfigPtr)
Definition: def_callouts.c:102
AGESA_STATUS agesa_EmptyIdsInitData(UINT32 Func, UINTN Data, VOID *ConfigPtr)
Definition: def_callouts.c:58
AGESA_STATUS agesa_NoopUnsupported(UINT32 Func, UINTN Data, VOID *ConfigPtr)
Definition: def_callouts.c:48
AGESA_STATUS agesa_NoopSuccess(UINT32 Func, UINTN Data, VOID *ConfigPtr)
Definition: def_callouts.c:53
AGESA_STATUS agesa_Reset(UINT32 Func, UINTN Data, VOID *ConfigPtr)
Definition: def_callouts.c:66
static struct smmstore_params_info info
Definition: ramstage.c:12
@ CONFIG
Definition: dsi_common.h:201
const int BiosCalloutsLen
Definition: BiosCallOuts.c:25
const BIOS_CALLOUT_STRUCT BiosCallouts[]
Definition: BiosCallOuts.c:13
void board_FCH_InitReset(struct sysinfo *cb_NA, FCH_RESET_DATA_BLOCK *FchParams_reset)
Definition: BiosCallOuts.c:157
void board_FCH_InitEnv(struct sysinfo *cb_NA, FCH_DATA_BLOCK *FchParams_env)
Definition: BiosCallOuts.c:161
static AGESA_STATUS board_ReadSpd_from_cbfs(UINT32 Func, UINTN Data, VOID *ConfigPtr)
Definition: BiosCallOuts.c:178
const CODEC_ENTRY Alc272_VerbTbl[]
ALC272 Verb Table.
Definition: BiosCallOuts.c:30
static void oem_fan_control(FCH_DATA_BLOCK *FchParams)
Definition: BiosCallOuts.c:92
static const CODEC_TBL_LIST CodecTableList[]
Definition: BiosCallOuts.c:48
AGESA_STATUS agesa_GfxGetVbiosImage(UINT32 Func, UINTN FchData, VOID *ConfigPrt)
#define ENV_ROMSTAGE
Definition: rules.h:149
int read_ddr3_spd_from_cbfs(u8 *buf, int idx)
uint8_t u8
Definition: stdint.h:45