coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
verstage.c
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <
delay.h
>
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#include <gpio.h>
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#include <
security/vboot/vboot_common.h
>
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#define TPM_RESET_GPIO 19
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static
void
ipq_setup_tpm
(
void
)
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{
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if
(
CONFIG
(I2C_TPM)) {
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gpio_tlmm_config_set
(
TPM_RESET_GPIO
,
FUNC_SEL_GPIO
,
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GPIO_PULL_UP
,
GPIO_6MA
, 1);
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gpio_set
(
TPM_RESET_GPIO
, 0);
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udelay
(100);
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gpio_set
(
TPM_RESET_GPIO
, 1);
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/*
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* ----- Per the SLB 9615XQ1.2 spec -----
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*
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* 4.7.1 Reset Timing
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*
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* The TPM_ACCESS_x.tpmEstablishment bit has the correct value
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* and the TPM_ACCESS_x.tpmRegValidSts bit is typically set
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* within 8ms after RESET# is deasserted.
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*
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* The TPM is ready to receive a command after less than 30 ms.
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*
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* --------------------------------------
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*
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* I'm assuming this means "wait for 30ms"
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*
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* If we don't wait here, subsequent QUP I2C accesses
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* to the TPM either fail or timeout.
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*/
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mdelay
(30);
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}
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}
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void
verstage_mainboard_init
(
void
)
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{
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ipq_setup_tpm
();
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}
delay.h
mdelay
void mdelay(unsigned int msecs)
Definition:
delay.c:2
CONFIG
@ CONFIG
Definition:
dsi_common.h:201
gpio_set
void gpio_set(gpio_t gpio, int value)
Definition:
gpio.c:174
TPM_RESET_GPIO
#define TPM_RESET_GPIO
Definition:
verstage.c:7
ipq_setup_tpm
static void ipq_setup_tpm(void)
Definition:
verstage.c:9
verstage_mainboard_init
void verstage_mainboard_init(void)
Definition:
verstage.c:41
GPIO_6MA
@ GPIO_6MA
Definition:
gpio_common.h:72
gpio_tlmm_config_set
void gpio_tlmm_config_set(gpio_t gpio, unsigned int func, unsigned int pull, unsigned int drvstr, unsigned int enable)
Definition:
gpio.c:32
FUNC_SEL_GPIO
#define FUNC_SEL_GPIO
Definition:
gpio.h:13
GPIO_PULL_UP
#define GPIO_PULL_UP
Definition:
gpio.h:24
udelay
void udelay(uint32_t us)
Definition:
udelay.c:15
vboot_common.h
src
mainboard
google
gale
verstage.c
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