coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
verstage.c
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <delay.h>
4 #include <gpio.h>
6 
7 #define TPM_RESET_GPIO 19
8 
9 static void ipq_setup_tpm(void)
10 {
11 
12  if (CONFIG(I2C_TPM)) {
16  udelay(100);
18 
19  /*
20  * ----- Per the SLB 9615XQ1.2 spec -----
21  *
22  * 4.7.1 Reset Timing
23  *
24  * The TPM_ACCESS_x.tpmEstablishment bit has the correct value
25  * and the TPM_ACCESS_x.tpmRegValidSts bit is typically set
26  * within 8ms after RESET# is deasserted.
27  *
28  * The TPM is ready to receive a command after less than 30 ms.
29  *
30  * --------------------------------------
31  *
32  * I'm assuming this means "wait for 30ms"
33  *
34  * If we don't wait here, subsequent QUP I2C accesses
35  * to the TPM either fail or timeout.
36  */
37  mdelay(30);
38  }
39 }
40 
42 {
43  ipq_setup_tpm();
44 }
void mdelay(unsigned int msecs)
Definition: delay.c:2
@ CONFIG
Definition: dsi_common.h:201
void gpio_set(gpio_t gpio, int value)
Definition: gpio.c:174
#define TPM_RESET_GPIO
Definition: verstage.c:7
static void ipq_setup_tpm(void)
Definition: verstage.c:9
void verstage_mainboard_init(void)
Definition: verstage.c:41
@ GPIO_6MA
Definition: gpio_common.h:72
void gpio_tlmm_config_set(gpio_t gpio, unsigned int func, unsigned int pull, unsigned int drvstr, unsigned int enable)
Definition: gpio.c:32
#define FUNC_SEL_GPIO
Definition: gpio.h:13
#define GPIO_PULL_UP
Definition: gpio.h:24
void udelay(uint32_t us)
Definition: udelay.c:15