coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
ramstage.h File Reference
#include <device/device.h>
#include <fsp/api.h>
#include <fsp/util.h>
#include <memory_info.h>
Include dependency graph for ramstage.h:

Go to the source code of this file.

Functions

void xeon_sp_init_cpus (struct device *dev)
 
void mainboard_silicon_init_params (FSPS_UPD *params)
 

Variables

struct pci_operations soc_pci_ops
 

Function Documentation

◆ mainboard_silicon_init_params()

◆ xeon_sp_init_cpus()

void xeon_sp_init_cpus ( struct device dev)

Definition at line 226 of file cpu.c.

References chip_config, device::chip_info, config_reset_cpl3_csrs(), FUNC_ENTER, FUNC_EXIT, device::link_list, mp_init_with_smm(), and xeonsp_init_cpu_config().

Here is the call graph for this function:

Variable Documentation

◆ soc_pci_ops

struct pci_operations soc_pci_ops
extern

Definition at line 40 of file chip.c.