11 #include <soc/southbridge.h>
26 if (
CONFIG(POST_IO) && (CONFIG_POST_IO_PORT == 0x80))
52 if (
CONFIG(SOC_AMD_COMMON_BLOCK_USE_ESPI) && !
CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK))
55 if (!
CONFIG(SOC_AMD_COMMON_BLOCK_USE_ESPI))
71 if (
CONFIG(AMD_SOC_CONSOLE_UART))
75 if (
CONFIG(DISABLE_KEYBOARD_RESET_PIN))
87 if (
CONFIG(DISABLE_SPI_FLASH_ROM_SHARING))
void enable_aoac_devices(void)
void fch_early_init(void)
void fch_enable_cf9_io(void)
void fch_enable_legacy_io(void)
void enable_acpimmio_decode_pm04(void)
void fch_disable_kb_rst(void)
static const struct soc_i2c_scl_pin i2c_scl_pins[]
static void reset_i2c_peripherals(void)
static void lpc_configure_decodes(void)
void pm_set_power_failure_state(void)
void fch_print_pmxc0_status(void)
void set_uart_config(unsigned int idx)
void clear_uart_legacy_config(void)
void sb_reset_i2c_peripherals(const struct soc_i2c_peripheral_reset_info *reset_info)
void i2c_soc_early_init(void)
void configure_espi_with_mb_hook(void)
#define I2C_RESET_SCL_PIN(pin_name, pin_mask_value)
void lpc_early_init(void)
void lpc_enable_port80(void)
void lpc_disable_spi_rom_sharing(void)
void fch_smbus_init(void)
void fch_spi_early_init(void)
void show_spi_speeds_and_modes(void)
Information about I2C peripherals that need to be reset.
const struct soc_i2c_scl_pin * i2c_scl
uint8_t i2c_scl_reset_mask
Data structure to identify GPIO to be toggled to reset peripherals on an I2C bus.