coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
gpio.c
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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#include <baseboard/gpio.h>
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#include <baseboard/variants.h>
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/* Pad configuration in ramstage */
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static
const
struct
pad_config
gpio_table
[] = {
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/* A10 : WWAN_EN */
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PAD_CFG_GPO
(
GPP_A10
, 1, PWROK),
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/* B7 : PCIE_CLKREQ2_N ==> WWAN_SAR_DETECT_ODL*/
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PAD_CFG_GPI_IRQ_WAKE(
GPP_B7
,
NONE
, DEEP, LEVEL, INVERT),
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/* D15 : EN_PP3300_CAMERA */
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PAD_CFG_GPO
(
GPP_D15
, 1, PLTRST),
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/* H17 : WWAN_RST_L */
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PAD_CFG_GPO
(
GPP_H17
, 0, PLTRST),
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};
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const
struct
pad_config
*
variant_override_gpio_table
(
size_t
*num)
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{
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*num =
ARRAY_SIZE
(
gpio_table
);
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return
gpio_table
;
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}
GPP_H17
#define GPP_H17
Definition:
gpio_soc_defs.h:233
GPP_A10
#define GPP_A10
Definition:
gpio_soc_defs.h:129
GPP_D15
#define GPP_D15
Definition:
gpio_soc_defs.h:267
GPP_B7
#define GPP_B7
Definition:
gpio_soc_defs.h:60
ARRAY_SIZE
#define ARRAY_SIZE(a)
Definition:
helpers.h:12
variant_override_gpio_table
const struct pad_config *__weak variant_override_gpio_table(size_t *num)
Definition:
gpio.c:450
gpio_table
static const struct pad_config gpio_table[]
Definition:
gpio.c:7
NONE
@ NONE
Definition:
qup_se_handlers_common.h:196
PAD_CFG_GPO
#define PAD_CFG_GPO(pad, val, rst)
Definition:
gpio_defs.h:247
pad_config
Definition:
gpio.h:75
src
mainboard
google
dedede
variants
sasukette
gpio.c
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