dsi_phy.c File Reference

#include <console/console.h>
#include <delay.h>
#include <device/mmio.h>
#include <edid.h>
#include <lib.h>
#include <soc/clock.h>
#include <soc/display/dsi_phy.h>
#include <soc/display/mdssreg.h>
#include <soc/display/display_resources.h>
#include <string.h>
#include <timer.h>

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Data Structures
struct	dsi_phy_divider_lut_entry_type
struct	dsi_phy_configtype

Macros
#define	HAL_DSI_PHY_PLL_READY_TIMEOUT_MS   150 /* ~15 ms */
#define	HAL_DSI_PHY_REFGEN_TIMEOUT_MS   150 /* ~15 ms */
#define	DSI_MAX_REFRESH_RATE   95
#define	DSI_MIN_REFRESH_RATE   15
#define	HAL_DSI_PLL_VCO_MIN_MHZ_2_2_0   1000
#define	S_DIV_ROUND_UP(n, d)    (((n) >= 0) ? (((n) + (d) - 1) / (d)) : (((n) - (d) + 1) / (d)))
#define	mult_frac(x, numer, denom)

Enumerations
enum	dsi_laneid_type {   DSI_LANEID_0 = 0 , DSI_LANEID_1 , DSI_LANEID_2 , DSI_LANEID_3 ,   DSI_LANEID_CLK , DSI_LANEID_MAX , DSI_LANEID_FORCE_32BIT = 0x7FFFFFFF }

Functions
static s32	linear_inter (s32 tmax, s32 tmin, s32 percent, s32 min_result, bool even)
static void	mdss_dsi_phy_reset (void)
static void	mdss_dsi_power_down (void)
static void	mdss_dsi_phy_setup_lanephy (enum dsi_laneid_type lane)
static void	mdss_dsi_calculate_phy_timings (struct msm_dsi_phy_ctrl *timing, struct dsi_phy_configtype *phy_cfg)
static enum cb_err	mdss_dsi_phy_timings (struct msm_dsi_phy_ctrl *phy_timings)
static enum cb_err	dsi_phy_waitforrefgen (void)
static enum cb_err	mdss_dsi_phy_commit (void)
static void	mdss_dsi_phy_setup (void)
static void	dsi_phy_resync_fifo (void)
static void	dsi_phy_pll_global_clk_enable (bool enable)
static enum cb_err	dsi_phy_pll_lock_detect (void)
static void	dsi_phy_toggle_dln3_tx_dctrl (void)
static void	dsi_phy_pll_set_source (void)
static void	dsi_phy_pll_bias_enable (bool enable)
static void	dsi_phy_mnd_divider (struct dsi_phy_configtype *phy_cfg)
static uint32_t	dsi_phy_dsiclk_divider (struct dsi_phy_configtype *phy_cfg)
static unsigned long	dsi_phy_calc_clk_divider (struct dsi_phy_configtype *phy_cfg)
static void	dsi_phy_pll_outputdiv_rate (struct dsi_phy_configtype *pll_cfg)
static enum cb_err	dsi_phy_pll_calcandcommit (struct dsi_phy_configtype *phy_cfg)
static uint32_t	dsi_calc_desired_bitclk (struct edid *edid, uint32_t num_lines, uint32_t bpp)
static enum cb_err	mdss_dsi_phy_pll_setup (struct edid *edid, uint32_t num_of_lanes, uint32_t bpp)
static enum cb_err	enable_dsi_clk (void)
enum cb_err	mdss_dsi_phy_10nm_init (struct edid *edid, uint32_t num_of_lanes, uint32_t bpp)

Variables
static struct dsi_phy_divider_lut_entry_type	pll_dividerlut_dphy []

Macro Definition Documentation

DSI_MAX_REFRESH_RATE

#define DSI_MAX_REFRESH_RATE   95

Definition at line 18 of file dsi_phy.c.

DSI_MIN_REFRESH_RATE

#define DSI_MIN_REFRESH_RATE   15

Definition at line 19 of file dsi_phy.c.

HAL_DSI_PHY_PLL_READY_TIMEOUT_MS

#define HAL_DSI_PHY_PLL_READY_TIMEOUT_MS   150 /* ~15 ms */

Definition at line 15 of file dsi_phy.c.

HAL_DSI_PHY_REFGEN_TIMEOUT_MS

#define HAL_DSI_PHY_REFGEN_TIMEOUT_MS   150 /* ~15 ms */

Definition at line 16 of file dsi_phy.c.

HAL_DSI_PLL_VCO_MIN_MHZ_2_2_0

#define HAL_DSI_PLL_VCO_MIN_MHZ_2_2_0   1000

Definition at line 21 of file dsi_phy.c.

mult_frac

#define mult_frac	(		x,
			numer,
			denom
	)

Value:

(                       \
{                                                       \
        typeof(x) quot = (x) / (denom);                 \
        typeof(x) rem  = (x) % (denom);                 \
        (quot * (numer)) + ((rem * (numer)) / (denom)); \
}                                                       \
)

Definition at line 26 of file dsi_phy.c.

S_DIV_ROUND_UP

#define S_DIV_ROUND_UP	(		n,
			d
	)		(((n) >= 0) ? (((n) + (d) - 1) / (d)) : (((n) - (d) + 1) / (d)))

Definition at line 23 of file dsi_phy.c.

Enumeration Type Documentation

dsi_laneid_type

enum dsi_laneid_type

Enumerator
DSI_LANEID_0
DSI_LANEID_1
DSI_LANEID_2
DSI_LANEID_3
DSI_LANEID_CLK
DSI_LANEID_MAX
DSI_LANEID_FORCE_32BIT

Definition at line 63 of file dsi_phy.c.

Function Documentation

dsi_calc_desired_bitclk()

static uint32_t dsi_calc_desired_bitclk ( struct edid *  edid, uint32_t  num_lines, uint32_t  bpp  )

static

Definition at line 675 of file dsi_phy.c.

References BIOS_INFO, KHz, edid::mode, edid_mode::pixel_clock, and printk.

dsi_phy_calc_clk_divider()

static unsigned long dsi_phy_calc_clk_divider ( struct dsi_phy_configtype *  phy_cfg )

static

Definition at line 536 of file dsi_phy.c.

References ARRAY_SIZE, dsi0_phy, dsi_phy_dsiclk_divider(), dsi_phy_mnd_divider(), HAL_DSI_PLL_VCO_MIN_MHZ_2_2_0, phy_cfg(), dsi_phy_regs::phy_cmn_clk_cfg0, dsi_phy_divider_lut_entry_type::phy_post_div, pll_dividerlut_dphy, dsi_phy_divider_lut_entry_type::pll_post_div, and write32().

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dsi_phy_dsiclk_divider()

static uint32_t dsi_phy_dsiclk_divider ( struct dsi_phy_configtype *  phy_cfg )

static

Definition at line 523 of file dsi_phy.c.

References phy_cfg().

Referenced by dsi_phy_calc_clk_divider().

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dsi_phy_mnd_divider()

static void dsi_phy_mnd_divider ( struct dsi_phy_configtype *  phy_cfg )

static

Definition at line 489 of file dsi_phy.c.

References phy_cfg().

Referenced by dsi_phy_calc_clk_divider().

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dsi_phy_pll_bias_enable()

static void dsi_phy_pll_bias_enable ( bool  enable )

static

Definition at line 476 of file dsi_phy.c.

References phy_pll_qlink, dsi_phy_pll_qlink_regs::pll_system_muxes, and write32().

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dsi_phy_pll_calcandcommit()

static enum cb_err dsi_phy_pll_calcandcommit ( struct dsi_phy_configtype *  phy_cfg )

static

Definition at line 612 of file dsi_phy.c.

References log2(), phy_pll_qlink, dsi_phy_pll_qlink_regs::pll_outdiv_rate, dsi_phy_divider_lut_entry_type::pll_post_div, dsi_phy_configtype::pll_post_div, and write32().

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dsi_phy_pll_global_clk_enable()

static void dsi_phy_pll_global_clk_enable ( bool  enable )

static

Definition at line 417 of file dsi_phy.c.

References dsi0_phy, dsi_phy_regs::phy_cmn_clk_cfg1, read32(), and write32().

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dsi_phy_pll_lock_detect()

static enum cb_err dsi_phy_pll_lock_detect ( void  )

static

Definition at line 417 of file dsi_phy.c.

dsi_phy_pll_outputdiv_rate()

static void dsi_phy_pll_outputdiv_rate ( struct dsi_phy_configtype *  pll_cfg )

static

Definition at line 612 of file dsi_phy.c.

dsi_phy_pll_set_source()

static void dsi_phy_pll_set_source ( void  )

static

Definition at line 464 of file dsi_phy.c.

References dsi0_phy, dsi_phy_regs::phy_cmn_clk_cfg1, read32(), and write32().

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dsi_phy_resync_fifo()

static void dsi_phy_resync_fifo ( void  )

static

Definition at line 411 of file dsi_phy.c.

References dsi0_phy, dsi_phy_regs::phy_cmn_rbuf_ctrl, and write32().

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dsi_phy_toggle_dln3_tx_dctrl()

static void dsi_phy_toggle_dln3_tx_dctrl ( void  )

static

Definition at line 450 of file dsi_phy.c.

References dsi_phy_regs::dln0_tx_dctrl, dsi0_phy, DSI_LANEID_3, dsi_phy_regs::phy_ln_regs, read32(), and write32().

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dsi_phy_waitforrefgen()

static enum cb_err dsi_phy_waitforrefgen ( void  )

static

Definition at line 192 of file dsi_phy.c.

References BIOS_INFO, msm_dsi_phy_ctrl::clk_post, msm_dsi_phy_ctrl::clk_pre, msm_dsi_phy_ctrl::clk_pre_inc_by_2, msm_dsi_phy_ctrl::clk_prepare, msm_dsi_phy_ctrl::clk_trail, msm_dsi_phy_ctrl::clk_zero, DIV_ROUND_UP, msm_dsi_phy_ctrl::half_byte_clk_en, msm_dsi_phy_ctrl::hs_exit, msm_dsi_phy_ctrl::hs_prepare, msm_dsi_phy_ctrl::hs_rqst, msm_dsi_phy_ctrl::hs_trail, msm_dsi_phy_ctrl::hs_zero, linear_inter(), MAX, mult_frac, phy_cfg(), printk, S_DIV_ROUND_UP, msm_dsi_phy_ctrl::ta_get, msm_dsi_phy_ctrl::ta_go, and msm_dsi_phy_ctrl::ta_sure.

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enable_dsi_clk()

static enum cb_err enable_dsi_clk ( void  )

static

Definition at line 675 of file dsi_phy.c.

linear_inter()

static s32 linear_inter ( s32  tmax, s32  tmin, s32  percent, s32  min_result, bool  even  )

inlinestatic

Definition at line 85 of file dsi_phy.c.

References MAX, and S_DIV_ROUND_UP.

Referenced by dsi_phy_waitforrefgen().

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mdss_dsi_calculate_phy_timings()

static void mdss_dsi_calculate_phy_timings ( struct msm_dsi_phy_ctrl *  timing, struct dsi_phy_configtype *  phy_cfg  )

static

Definition at line 192 of file dsi_phy.c.

mdss_dsi_phy_10nm_init()

enum cb_err mdss_dsi_phy_10nm_init	(	struct edid *	edid,
		uint32_t	num_of_lanes,
		uint32_t	bpp
	)

Definition at line 675 of file dsi_phy.c.

mdss_dsi_phy_commit()

static enum cb_err mdss_dsi_phy_commit ( void  )

static

Definition at line 192 of file dsi_phy.c.

Referenced by mdss_dsi_phy_setup().

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mdss_dsi_phy_pll_setup()

static enum cb_err mdss_dsi_phy_pll_setup ( struct edid *  edid, uint32_t  num_of_lanes, uint32_t  bpp  )

static

Definition at line 675 of file dsi_phy.c.

mdss_dsi_phy_reset()

static void mdss_dsi_phy_reset ( void  )

static

Definition at line 98 of file dsi_phy.c.

References dsi0_phy, dsi_phy_regs::phy_cmn_ctrl1, udelay(), and write32().

Referenced by mdss_dsi_phy_setup().

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mdss_dsi_phy_setup()

static void mdss_dsi_phy_setup ( void  )

static

Definition at line 402 of file dsi_phy.c.

References mdss_dsi_phy_commit(), and mdss_dsi_phy_reset().

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mdss_dsi_phy_setup_lanephy()

static void mdss_dsi_phy_setup_lanephy ( enum dsi_laneid_type  lane )

static

Definition at line 117 of file dsi_phy.c.

References dsi_phy_regs::dln0_cfg, dsi_phy_regs::dln0_hstx_str_ctrl, dsi_phy_regs::dln0_lprx_ctrl, dsi_phy_regs::dln0_lptx_str_ctrl, dsi_phy_regs::dln0_offset_bot_ctrl, dsi_phy_regs::dln0_offset_top_ctrl, dsi_phy_regs::dln0_pin_swap, dsi_phy_regs::dln0_tx_dctrl, dsi0_phy, DSI_LANEID_0, DSI_LANEID_CLK, dsi_phy_regs::phy_ln_regs, and write32().

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mdss_dsi_phy_timings()

static enum cb_err mdss_dsi_phy_timings ( struct msm_dsi_phy_ctrl *  phy_timings )

static

Definition at line 192 of file dsi_phy.c.

mdss_dsi_power_down()

static void mdss_dsi_power_down ( void  )

static

Definition at line 105 of file dsi_phy.c.

References dsi0_phy, dsi_phy_regs::phy_cmn_ctrl0, dsi_phy_regs::phy_cmn_pll_ctrl, dsi_phy_regs::phy_cmn_rbuf_ctrl, and write32().

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Variable Documentation

pll_dividerlut_dphy

struct dsi_phy_divider_lut_entry_type pll_dividerlut_dphy[]

static

Initial value:

= {
 
        { 2, 11 },
        { 4, 5 },
        { 2, 9 },
        { 8, 2 },
        { 1, 15 },
        { 2, 7 },
        { 1, 13 },
        { 4, 3 },
        { 1, 11 },
        { 2, 5 },
        { 1, 9 },
        { 8, 1 },
        { 1, 7 },
        { 2, 3 },
        { 1, 5 },
        { 4, 1 },
        { 1, 3 },
        { 2, 1 },
        { 1, 1 }
}

Definition at line 1 of file dsi_phy.c.

Referenced by dsi_phy_calc_clk_divider().