coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
gpio.c
Go to the documentation of this file.
1
/* SPDX-License-Identifier: GPL-2.0-only */
2
3
#include <soc/gpio.h>
4
#include <variant/gpio.h>
5
6
static
const
struct
pad_config
gpio_table
[] = {
7
// RCIN#
8
_PAD_CFG_STRUCT
(
GPP_A0
, 0x44000502, 0x0),
9
10
// LAD0
11
_PAD_CFG_STRUCT
(
GPP_A1
, 0x44000402, 0x0),
12
13
// LAD1
14
_PAD_CFG_STRUCT
(
GPP_A2
, 0x44000402, 0x0),
15
16
// LAD2
17
_PAD_CFG_STRUCT
(
GPP_A3
, 0x44000402, 0x0),
18
19
// LAD3
20
_PAD_CFG_STRUCT
(
GPP_A4
, 0x44000402, 0x0),
21
22
// LFRAME#
23
_PAD_CFG_STRUCT
(
GPP_A5
, 0x44000600, 0x0),
24
25
// SERIRQ
26
_PAD_CFG_STRUCT
(
GPP_A6
, 0x44000402, 0x0),
27
28
// PIRQA#
29
_PAD_CFG_STRUCT
(
GPP_A7
, 0x44000102, 0x0),
30
31
// CLKRUN#
32
_PAD_CFG_STRUCT
(
GPP_A8
, 0x44000700, 0x0),
33
34
// CLKOUT_LPC0
35
_PAD_CFG_STRUCT
(
GPP_A9
, 0x44000600, 0x0),
36
37
// CLKOUT_LPC1
38
_PAD_CFG_STRUCT
(
GPP_A10
, 0x44000600, 0x1000),
39
40
// PME#
41
_PAD_CFG_STRUCT
(
GPP_A11
, 0x44000200, 0x0),
42
43
// BM_BUSY#
44
_PAD_CFG_STRUCT
(
GPP_A12
, 0x44000200, 0x0),
45
46
// SUSWARN#/SUSPWRDNACK
47
_PAD_CFG_STRUCT
(
GPP_A13
, 0x44000200, 0x0),
48
49
// SUS_STAT#/ESPI_RESET#
50
_PAD_CFG_STRUCT
(
GPP_A14
, 0x44000600, 0x0),
51
52
// SUS_ACK#
53
_PAD_CFG_STRUCT
(
GPP_A15
, 0x44000502, 0x0),
54
55
// SD_1P8_SEL
56
_PAD_CFG_STRUCT
(
GPP_A16
, 0x44000200, 0x0),
57
58
// SD_PWR_EN#
59
_PAD_CFG_STRUCT
(
GPP_A17
, 0x44000200, 0x0),
60
61
// ISH_GP0
62
_PAD_CFG_STRUCT
(
GPP_A18
, 0x44000201, 0x0),
63
64
// ISH_GP1
65
_PAD_CFG_STRUCT
(
GPP_A19
, 0x44000603, 0x0),
66
67
// ISH_GP2
68
_PAD_CFG_STRUCT
(
GPP_A20
, 0x44000200, 0x0),
69
70
// ISH_GP3
71
_PAD_CFG_STRUCT
(
GPP_A21
, 0x84000200, 0x1000),
72
73
// ISH_GP4
74
_PAD_CFG_STRUCT
(
GPP_A22
, 0x4000200, 0x0),
75
76
// ISH_GP5
77
_PAD_CFG_STRUCT
(
GPP_A23
, 0x4000200, 0x0),
78
79
// CORE_VID0
80
_PAD_CFG_STRUCT
(
GPP_B0
, 0x44000700, 0x0),
81
82
// CORE_VID1
83
_PAD_CFG_STRUCT
(
GPP_B1
, 0x44000700, 0x0),
84
85
// VRALERT#
86
_PAD_CFG_STRUCT
(
GPP_B2
, 0x44000200, 0x0),
87
88
// CPU_GP2
89
_PAD_CFG_STRUCT
(
GPP_B3
, 0x44000200, 0x0),
90
91
// CPU_GP3
92
_PAD_CFG_STRUCT
(
GPP_B4
, 0x44000200, 0x0),
93
94
// SRCCLKREQ0#
95
_PAD_CFG_STRUCT
(
GPP_B5
, 0x44000200, 0x0),
96
97
// SRCCLKREQ1#
98
_PAD_CFG_STRUCT
(
GPP_B6
, 0x44000200, 0x0),
99
100
// SRCCLKREQ2#
101
_PAD_CFG_STRUCT
(
GPP_B7
, 0x44000700, 0x0),
102
103
// SRCCLKREQ3#
104
_PAD_CFG_STRUCT
(
GPP_B8
, 0x44000700, 0x0),
105
106
// SRCCLKREQ4#
107
_PAD_CFG_STRUCT
(
GPP_B9
, 0x44000702, 0x0),
108
109
// SRCCLKREQ5#
110
_PAD_CFG_STRUCT
(
GPP_B10
, 0x44000702, 0x0),
111
112
// EXT_PWR_GATE#
113
_PAD_CFG_STRUCT
(
GPP_B11
, 0x44000700, 0x0),
114
115
// SLP_S0#
116
_PAD_CFG_STRUCT
(
GPP_B12
, 0x44000200, 0x0),
117
118
// PLTRST#
119
_PAD_CFG_STRUCT
(
GPP_B13
, 0x44000700, 0x0),
120
121
// SPKR
122
_PAD_CFG_STRUCT
(
GPP_B14
, 0x44000600, 0x1000),
123
124
// GSPI0_CS#
125
_PAD_CFG_STRUCT
(
GPP_B15
, 0x44000200, 0x0),
126
127
// GSPI0_CLK
128
_PAD_CFG_STRUCT
(
GPP_B16
, 0x44000200, 0x0),
129
130
// GSPI0_MISO
131
_PAD_CFG_STRUCT
(
GPP_B17
, 0x44000200, 0x0),
132
133
// GSPI0_MOSI
134
_PAD_CFG_STRUCT
(
GPP_B18
, 0x44000600, 0x3000),
135
136
// GSPI1_CS#
137
_PAD_CFG_STRUCT
(
GPP_B19
, 0x44000200, 0x0),
138
139
// GSPI1_CLK
140
_PAD_CFG_STRUCT
(
GPP_B20
, 0x44000200, 0x0),
141
142
// GSPI1_MISO
143
_PAD_CFG_STRUCT
(
GPP_B21
, 0x44000200, 0x0),
144
145
// GSPI1_MOSI
146
_PAD_CFG_STRUCT
(
GPP_B22
, 0x44000700, 0x1000),
147
148
// SML1ALERT#/PCHHOT#
149
_PAD_CFG_STRUCT
(
GPP_B23
, 0x44000200, 0x0),
150
151
// SMBCLK
152
_PAD_CFG_STRUCT
(
GPP_C0
, 0x44000702, 0x0),
153
154
// SMBDATA
155
_PAD_CFG_STRUCT
(
GPP_C1
, 0x44000702, 0x1000),
156
157
// SMBALERT#
158
_PAD_CFG_STRUCT
(
GPP_C2
, 0x44000201, 0x1000),
159
160
// SML0CLK
161
_PAD_CFG_STRUCT
(
GPP_C3
, 0x44000200, 0x0),
162
163
// SML0DATA
164
_PAD_CFG_STRUCT
(
GPP_C4
, 0x44000200, 0x0),
165
166
// SML0ALERT#
167
_PAD_CFG_STRUCT
(
GPP_C5
, 0x44000200, 0x0),
168
169
// SML1CLK
170
// _PAD_CFG_STRUCT(GPP_C6, 0xffffffff, 0xffffff00),
171
172
// SML1DATA
173
// _PAD_CFG_STRUCT(GPP_C7, 0xffffffff, 0xffffff00),
174
175
// UART0_RXD
176
_PAD_CFG_STRUCT
(
GPP_C8
, 0x44000700, 0x0),
177
178
// UART0_TXD
179
_PAD_CFG_STRUCT
(
GPP_C9
, 0x44000700, 0x0),
180
181
// UART0_RTS#
182
_PAD_CFG_STRUCT
(
GPP_C10
, 0x44000700, 0x0),
183
184
// UART0_CTS#
185
_PAD_CFG_STRUCT
(
GPP_C11
, 0x44000700, 0x0),
186
187
// UART1_RXD
188
_PAD_CFG_STRUCT
(
GPP_C12
, 0x44000702, 0x0),
189
190
// UART1_TXD
191
_PAD_CFG_STRUCT
(
GPP_C13
, 0x82880102, 0x0),
192
193
// UART1_RTS#
194
_PAD_CFG_STRUCT
(
GPP_C14
, 0x44000700, 0x0),
195
196
// UART1_CTS#
197
_PAD_CFG_STRUCT
(
GPP_C15
, 0x44000700, 0x0),
198
199
// I2C0_SDA
200
_PAD_CFG_STRUCT
(
GPP_C16
, 0x44000200, 0x0),
201
202
// I2C0_SCL
203
_PAD_CFG_STRUCT
(
GPP_C17
, 0x44000200, 0x0),
204
205
// I2C1_SDA
206
_PAD_CFG_STRUCT
(
GPP_C18
, 0x44000200, 0x0),
207
208
// I2C1_SCL
209
_PAD_CFG_STRUCT
(
GPP_C19
, 0x40880102, 0x0),
210
211
// UART2_RXD
212
_PAD_CFG_STRUCT
(
GPP_C20
, 0x44000702, 0x0),
213
214
// UART2_TXD
215
_PAD_CFG_STRUCT
(
GPP_C21
, 0x44000700, 0x0),
216
217
// UART2_RTS#
218
_PAD_CFG_STRUCT
(
GPP_C22
, 0x44000700, 0x0),
219
220
// UART2_CTS#
221
_PAD_CFG_STRUCT
(
GPP_C23
, 0x44000700, 0x0),
222
223
// SPI1_CS#
224
_PAD_CFG_STRUCT
(
GPP_D0
, 0x44000200, 0x0),
225
226
// SPI1_CLK
227
_PAD_CFG_STRUCT
(
GPP_D1
, 0x44000200, 0x0),
228
229
// SPI1_MISO
230
_PAD_CFG_STRUCT
(
GPP_D2
, 0x44000200, 0x0),
231
232
// SPI1_MOSI
233
_PAD_CFG_STRUCT
(
GPP_D3
, 0x44000200, 0x0),
234
235
// FLASHTRIG
236
_PAD_CFG_STRUCT
(
GPP_D4
, 0x44000200, 0x0),
237
238
// ISH_I2C0_SDA
239
_PAD_CFG_STRUCT
(
GPP_D5
, 0x44000700, 0x0),
240
241
// ISH_I2C0_SCL
242
_PAD_CFG_STRUCT
(
GPP_D6
, 0x44000700, 0x0),
243
244
// ISH_I2C1_SDA
245
_PAD_CFG_STRUCT
(
GPP_D7
, 0x44000700, 0x0),
246
247
// ISH_I2C1_SCL
248
_PAD_CFG_STRUCT
(
GPP_D8
, 0x44000201, 0x0),
249
250
// GPIO
251
_PAD_CFG_STRUCT
(
GPP_D9
, 0x44000200, 0x0),
252
253
// GPIO
254
_PAD_CFG_STRUCT
(
GPP_D10
, 0x44000200, 0x0),
255
256
// GPIO
257
_PAD_CFG_STRUCT
(
GPP_D11
, 0x44000200, 0x0),
258
259
// GPIO
260
_PAD_CFG_STRUCT
(
GPP_D12
, 0x44000200, 0x0),
261
262
// ISH_UART0_RXD
263
_PAD_CFG_STRUCT
(
GPP_D13
, 0x44000200, 0x0),
264
265
// ISH_UART0_TXD
266
_PAD_CFG_STRUCT
(
GPP_D14
, 0x44000200, 0x0),
267
268
// ISH_UART0_RTS#
269
_PAD_CFG_STRUCT
(
GPP_D15
, 0x44000700, 0x0),
270
271
// ISH_UART0_CTS#
272
_PAD_CFG_STRUCT
(
GPP_D16
, 0x44000700, 0x0),
273
274
// DMIC_CLK1
275
_PAD_CFG_STRUCT
(
GPP_D17
, 0x44000700, 0x0),
276
277
// DMIC_DATA1
278
_PAD_CFG_STRUCT
(
GPP_D18
, 0x44000700, 0x0),
279
280
// DMIC_CLK0
281
_PAD_CFG_STRUCT
(
GPP_D19
, 0x44000700, 0x0),
282
283
// DMIC_DATA0
284
_PAD_CFG_STRUCT
(
GPP_D20
, 0x44000700, 0x0),
285
286
// SPI1_IO2
287
_PAD_CFG_STRUCT
(
GPP_D21
, 0x44000102, 0x0),
288
289
// SPI1_IO3
290
_PAD_CFG_STRUCT
(
GPP_D22
, 0x44000700, 0x0),
291
292
// I2S_MCLK
293
_PAD_CFG_STRUCT
(
GPP_D23
, 0x44000700, 0x0),
294
295
// SATAXPCIE0/SATAGP0
296
_PAD_CFG_STRUCT
(
GPP_E0
, 0x42100100, 0x1000),
297
298
// SATAXPCIE1/SATAGP1
299
_PAD_CFG_STRUCT
(
GPP_E1
, 0x44000702, 0x0),
300
301
// SATAXPCIE2/SATAGP2
302
_PAD_CFG_STRUCT
(
GPP_E2
, 0x44000502, 0x0),
303
304
// CPU_GP0
305
_PAD_CFG_STRUCT
(
GPP_E3
, 0x40000000, 0x0),
306
307
// DEVSLP0
308
_PAD_CFG_STRUCT
(
GPP_E4
, 0x4000700, 0x0),
309
310
// DEVSLP1
311
_PAD_CFG_STRUCT
(
GPP_E5
, 0x4000700, 0x0),
312
313
// DEVSLP2
314
_PAD_CFG_STRUCT
(
GPP_E6
, 0x44000200, 0x0),
315
316
// CPU_GP1
317
_PAD_CFG_STRUCT
(
GPP_E7
, 0x44000100, 0x0),
318
319
// SATALED#
320
_PAD_CFG_STRUCT
(
GPP_E8
, 0x44000700, 0x0),
321
322
// USB2_OC0#
323
_PAD_CFG_STRUCT
(
GPP_E9
, 0x44000200, 0x0),
324
325
// USB2_OC1#
326
_PAD_CFG_STRUCT
(
GPP_E10
, 0x44000200, 0x0),
327
328
// USB2_OC2#
329
_PAD_CFG_STRUCT
(
GPP_E11
, 0x44000200, 0x0),
330
331
// USB2_OC3#
332
_PAD_CFG_STRUCT
(
GPP_E12
, 0x44000200, 0x0),
333
334
// DDPB_HPD0
335
_PAD_CFG_STRUCT
(
GPP_E13
, 0x44000700, 0x0),
336
337
// DDPC_HPD1
338
_PAD_CFG_STRUCT
(
GPP_E14
, 0x44000700, 0x0),
339
340
// DDPD_HPD2
341
_PAD_CFG_STRUCT
(
GPP_E15
, 0x42840102, 0x0),
342
343
// DDPE_HPD3
344
_PAD_CFG_STRUCT
(
GPP_E16
, 0x80880102, 0x0),
345
346
// EDP_HPD
347
_PAD_CFG_STRUCT
(
GPP_E17
, 0x44000702, 0x0),
348
349
// DDPB_CTRLCLK
350
_PAD_CFG_STRUCT
(
GPP_E18
, 0x44000700, 0x0),
351
352
// DDPB_CTRLDATA
353
_PAD_CFG_STRUCT
(
GPP_E19
, 0x44000700, 0x1000),
354
355
// DDPC_CTRLCLK
356
_PAD_CFG_STRUCT
(
GPP_E20
, 0x44000702, 0x0),
357
358
// DDPC_CTRLDATA
359
_PAD_CFG_STRUCT
(
GPP_E21
, 0x44000702, 0x1000),
360
361
// DDPD_CTRLCLK
362
_PAD_CFG_STRUCT
(
GPP_E22
, 0x40100000, 0x0),
363
364
// DDPD_CTRLDATA
365
_PAD_CFG_STRUCT
(
GPP_E23
, 0x44000201, 0x1000),
366
367
// BATLOW#
368
_PAD_CFG_STRUCT
(
GPD0
, 0x4000702, 0x0),
369
370
// LANPHYPC
371
_PAD_CFG_STRUCT
(
GPD1
, 0x4000700, 0x0),
372
373
// LAN_WAKE#
374
_PAD_CFG_STRUCT
(
GPD2
, 0x880502, 0x0),
375
376
// PWRBTN#
377
_PAD_CFG_STRUCT
(
GPD3
, 0x4000702, 0x3000),
378
379
// SLP_S3#
380
_PAD_CFG_STRUCT
(
GPD4
, 0x4000700, 0x0),
381
382
// SLP_S4#
383
_PAD_CFG_STRUCT
(
GPD5
, 0x4000700, 0x0),
384
385
// SLP_A#
386
_PAD_CFG_STRUCT
(
GPD6
, 0x4000700, 0x0),
387
388
// RSVD
389
_PAD_CFG_STRUCT
(
GPD7
, 0x4000301, 0x0),
390
391
// SUSCLK
392
_PAD_CFG_STRUCT
(
GPD8
, 0x4000700, 0x0),
393
394
// SLP_WLAN#
395
_PAD_CFG_STRUCT
(
GPD9
, 0x4000700, 0x0),
396
397
// SLP_S5#
398
_PAD_CFG_STRUCT
(
GPD10
, 0x4000700, 0x0),
399
400
// LANPHYPC
401
_PAD_CFG_STRUCT
(
GPD11
, 0x4000500, 0x0),
402
403
// I2S2_SCLK
404
_PAD_CFG_STRUCT
(
GPP_F0
, 0x44000702, 0x0),
405
406
// I2S2_SFRM
407
_PAD_CFG_STRUCT
(
GPP_F1
, 0x44000702, 0x0),
408
409
// I2S2_TXD
410
_PAD_CFG_STRUCT
(
GPP_F2
, 0x44000700, 0x0),
411
412
// I2S2_RXD
413
_PAD_CFG_STRUCT
(
GPP_F3
, 0x44000702, 0x0),
414
415
// I2C2_SDA
416
_PAD_CFG_STRUCT
(
GPP_F4
, 0x44000702, 0x2000000),
417
418
// I2C2_SCL
419
_PAD_CFG_STRUCT
(
GPP_F5
, 0x44000702, 0x2000000),
420
421
// I2C3_SDA
422
_PAD_CFG_STRUCT
(
GPP_F6
, 0x44000702, 0x2000000),
423
424
// I2C3_SCL
425
_PAD_CFG_STRUCT
(
GPP_F7
, 0x44000702, 0x2000000),
426
427
// I2C4_SDA
428
_PAD_CFG_STRUCT
(
GPP_F8
, 0x44000702, 0x2000000),
429
430
// I2C4_SCL
431
_PAD_CFG_STRUCT
(
GPP_F9
, 0x44000702, 0x2000000),
432
433
// I2C5_SDA/ISH_I2C2_SDA
434
_PAD_CFG_STRUCT
(
GPP_F10
, 0x44000b02, 0x2000000),
435
436
// I2C5_SCL/ISH_I2C2_SCL
437
_PAD_CFG_STRUCT
(
GPP_F11
, 0x44000b02, 0x2000000),
438
439
// EMMC_CMD
440
_PAD_CFG_STRUCT
(
GPP_F12
, 0x44000702, 0x0),
441
442
// EMMC_DATA0
443
_PAD_CFG_STRUCT
(
GPP_F13
, 0x44000702, 0x0),
444
445
// EMMC_DATA1
446
_PAD_CFG_STRUCT
(
GPP_F14
, 0x44000702, 0x0),
447
448
// EMMC_DATA2
449
_PAD_CFG_STRUCT
(
GPP_F15
, 0x44000702, 0x0),
450
451
// EMMC_DATA3
452
_PAD_CFG_STRUCT
(
GPP_F16
, 0x44000702, 0x0),
453
454
// EMMC_DATA4
455
_PAD_CFG_STRUCT
(
GPP_F17
, 0x44000702, 0x0),
456
457
// EMMC_DATA5
458
_PAD_CFG_STRUCT
(
GPP_F18
, 0x44000702, 0x0),
459
460
// EMMC_DATA6
461
_PAD_CFG_STRUCT
(
GPP_F19
, 0x44000702, 0x0),
462
463
// EMMC_DATA7
464
_PAD_CFG_STRUCT
(
GPP_F20
, 0x44000702, 0x0),
465
466
// EMMC_RCLK
467
_PAD_CFG_STRUCT
(
GPP_F21
, 0x44000702, 0x0),
468
469
// EMMC_CLK
470
_PAD_CFG_STRUCT
(
GPP_F22
, 0x44000700, 0x0),
471
472
// GPIO
473
_PAD_CFG_STRUCT
(
GPP_F23
, 0x40100100, 0x0),
474
475
// SD_CMD
476
_PAD_CFG_STRUCT
(
GPP_G0
, 0x44000700, 0x0),
477
478
// SD_DATA0
479
_PAD_CFG_STRUCT
(
GPP_G1
, 0x44000102, 0x0),
480
481
// SD_DATA1
482
_PAD_CFG_STRUCT
(
GPP_G2
, 0x44000700, 0x0),
483
484
// SD_DATA2
485
_PAD_CFG_STRUCT
(
GPP_G3
, 0x44000700, 0x0),
486
487
// SD_DATA3
488
_PAD_CFG_STRUCT
(
GPP_G4
, 0x44000700, 0x0),
489
490
// SD_CD#
491
_PAD_CFG_STRUCT
(
GPP_G5
, 0x44000702, 0x0),
492
493
// SD_CLK
494
_PAD_CFG_STRUCT
(
GPP_G6
, 0x44000700, 0x0),
495
496
// SD_WP
497
_PAD_CFG_STRUCT
(
GPP_G7
, 0x44000702, 0x0)
498
};
499
500
void
variant_configure_gpios
(
void
)
501
{
502
gpio_configure_pads
(
gpio_table
,
ARRAY_SIZE
(
gpio_table
));
503
}
GPD11
#define GPD11
Definition:
gpio_soc_defs.h:392
GPP_A4
#define GPP_A4
Definition:
gpio_soc_defs.h:123
GPP_C15
#define GPP_C15
Definition:
gpio_soc_defs.h:552
GPD3
#define GPD3
Definition:
gpio_soc_defs.h:384
GPP_B6
#define GPP_B6
Definition:
gpio_soc_defs.h:59
GPP_D1
#define GPP_D1
Definition:
gpio_soc_defs.h:253
GPD9
#define GPD9
Definition:
gpio_soc_defs.h:390
GPP_C2
#define GPP_C2
Definition:
gpio_soc_defs.h:539
GPP_D10
#define GPP_D10
Definition:
gpio_soc_defs.h:262
GPP_D8
#define GPP_D8
Definition:
gpio_soc_defs.h:260
GPP_D17
#define GPP_D17
Definition:
gpio_soc_defs.h:269
GPP_E3
#define GPP_E3
Definition:
gpio_soc_defs.h:631
GPP_A18
#define GPP_A18
Definition:
gpio_soc_defs.h:137
GPP_F21
#define GPP_F21
Definition:
gpio_soc_defs.h:594
GPP_C12
#define GPP_C12
Definition:
gpio_soc_defs.h:549
GPP_F12
#define GPP_F12
Definition:
gpio_soc_defs.h:585
GPP_F16
#define GPP_F16
Definition:
gpio_soc_defs.h:589
GPP_E0
#define GPP_E0
Definition:
gpio_soc_defs.h:628
GPP_F6
#define GPP_F6
Definition:
gpio_soc_defs.h:579
GPP_D14
#define GPP_D14
Definition:
gpio_soc_defs.h:266
GPP_B1
#define GPP_B1
Definition:
gpio_soc_defs.h:54
GPP_F20
#define GPP_F20
Definition:
gpio_soc_defs.h:593
GPP_F23
#define GPP_F23
Definition:
gpio_soc_defs.h:596
GPP_C5
#define GPP_C5
Definition:
gpio_soc_defs.h:542
GPP_A14
#define GPP_A14
Definition:
gpio_soc_defs.h:133
GPP_B12
#define GPP_B12
Definition:
gpio_soc_defs.h:65
GPP_D12
#define GPP_D12
Definition:
gpio_soc_defs.h:264
GPP_B16
#define GPP_B16
Definition:
gpio_soc_defs.h:69
GPP_A5
#define GPP_A5
Definition:
gpio_soc_defs.h:124
GPP_B2
#define GPP_B2
Definition:
gpio_soc_defs.h:55
GPP_D7
#define GPP_D7
Definition:
gpio_soc_defs.h:259
GPP_B13
#define GPP_B13
Definition:
gpio_soc_defs.h:66
GPP_E6
#define GPP_E6
Definition:
gpio_soc_defs.h:634
GPP_F0
#define GPP_F0
Definition:
gpio_soc_defs.h:573
GPP_D6
#define GPP_D6
Definition:
gpio_soc_defs.h:258
GPP_A19
#define GPP_A19
Definition:
gpio_soc_defs.h:138
GPP_D2
#define GPP_D2
Definition:
gpio_soc_defs.h:254
GPP_C9
#define GPP_C9
Definition:
gpio_soc_defs.h:546
GPP_C22
#define GPP_C22
Definition:
gpio_soc_defs.h:559
GPD0
#define GPD0
Definition:
gpio_soc_defs.h:380
GPP_D9
#define GPP_D9
Definition:
gpio_soc_defs.h:261
GPP_F5
#define GPP_F5
Definition:
gpio_soc_defs.h:578
GPP_B15
#define GPP_B15
Definition:
gpio_soc_defs.h:68
GPP_E13
#define GPP_E13
Definition:
gpio_soc_defs.h:641
GPP_A2
#define GPP_A2
Definition:
gpio_soc_defs.h:121
GPP_C23
#define GPP_C23
Definition:
gpio_soc_defs.h:560
GPP_C8
#define GPP_C8
Definition:
gpio_soc_defs.h:545
GPP_D11
#define GPP_D11
Definition:
gpio_soc_defs.h:263
GPP_A6
#define GPP_A6
Definition:
gpio_soc_defs.h:125
GPP_C11
#define GPP_C11
Definition:
gpio_soc_defs.h:548
GPP_D5
#define GPP_D5
Definition:
gpio_soc_defs.h:257
GPP_B22
#define GPP_B22
Definition:
gpio_soc_defs.h:75
GPP_A23
#define GPP_A23
Definition:
gpio_soc_defs.h:142
GPP_C18
#define GPP_C18
Definition:
gpio_soc_defs.h:555
GPP_F9
#define GPP_F9
Definition:
gpio_soc_defs.h:582
GPP_C13
#define GPP_C13
Definition:
gpio_soc_defs.h:550
GPP_E14
#define GPP_E14
Definition:
gpio_soc_defs.h:642
GPP_E23
#define GPP_E23
Definition:
gpio_soc_defs.h:651
GPP_E9
#define GPP_E9
Definition:
gpio_soc_defs.h:637
GPP_C17
#define GPP_C17
Definition:
gpio_soc_defs.h:554
GPP_E8
#define GPP_E8
Definition:
gpio_soc_defs.h:636
GPP_A7
#define GPP_A7
Definition:
gpio_soc_defs.h:126
GPP_E5
#define GPP_E5
Definition:
gpio_soc_defs.h:633
GPP_A0
#define GPP_A0
Definition:
gpio_soc_defs.h:119
GPD7
#define GPD7
Definition:
gpio_soc_defs.h:388
GPP_B8
#define GPP_B8
Definition:
gpio_soc_defs.h:61
GPP_C20
#define GPP_C20
Definition:
gpio_soc_defs.h:557
GPP_B20
#define GPP_B20
Definition:
gpio_soc_defs.h:73
GPP_A20
#define GPP_A20
Definition:
gpio_soc_defs.h:139
GPP_A16
#define GPP_A16
Definition:
gpio_soc_defs.h:135
GPP_F1
#define GPP_F1
Definition:
gpio_soc_defs.h:574
GPP_F17
#define GPP_F17
Definition:
gpio_soc_defs.h:590
GPP_A12
#define GPP_A12
Definition:
gpio_soc_defs.h:131
GPP_F15
#define GPP_F15
Definition:
gpio_soc_defs.h:588
GPP_D4
#define GPP_D4
Definition:
gpio_soc_defs.h:256
GPP_C10
#define GPP_C10
Definition:
gpio_soc_defs.h:547
GPD2
#define GPD2
Definition:
gpio_soc_defs.h:383
GPP_F10
#define GPP_F10
Definition:
gpio_soc_defs.h:583
GPP_A3
#define GPP_A3
Definition:
gpio_soc_defs.h:122
GPP_E7
#define GPP_E7
Definition:
gpio_soc_defs.h:635
GPP_C16
#define GPP_C16
Definition:
gpio_soc_defs.h:553
GPP_F7
#define GPP_F7
Definition:
gpio_soc_defs.h:580
GPD1
#define GPD1
Definition:
gpio_soc_defs.h:382
GPP_F13
#define GPP_F13
Definition:
gpio_soc_defs.h:586
GPP_C4
#define GPP_C4
Definition:
gpio_soc_defs.h:541
GPP_D18
#define GPP_D18
Definition:
gpio_soc_defs.h:270
GPP_B19
#define GPP_B19
Definition:
gpio_soc_defs.h:72
GPP_E17
#define GPP_E17
Definition:
gpio_soc_defs.h:645
GPP_E2
#define GPP_E2
Definition:
gpio_soc_defs.h:630
GPP_E19
#define GPP_E19
Definition:
gpio_soc_defs.h:647
GPP_C21
#define GPP_C21
Definition:
gpio_soc_defs.h:558
GPP_B9
#define GPP_B9
Definition:
gpio_soc_defs.h:62
GPD10
#define GPD10
Definition:
gpio_soc_defs.h:391
GPP_E18
#define GPP_E18
Definition:
gpio_soc_defs.h:646
GPP_F14
#define GPP_F14
Definition:
gpio_soc_defs.h:587
GPP_F4
#define GPP_F4
Definition:
gpio_soc_defs.h:577
GPP_A10
#define GPP_A10
Definition:
gpio_soc_defs.h:129
GPP_A8
#define GPP_A8
Definition:
gpio_soc_defs.h:127
GPP_D0
#define GPP_D0
Definition:
gpio_soc_defs.h:252
GPP_A1
#define GPP_A1
Definition:
gpio_soc_defs.h:120
GPP_B14
#define GPP_B14
Definition:
gpio_soc_defs.h:67
GPP_B11
#define GPP_B11
Definition:
gpio_soc_defs.h:64
GPP_D13
#define GPP_D13
Definition:
gpio_soc_defs.h:265
GPP_B18
#define GPP_B18
Definition:
gpio_soc_defs.h:71
GPP_B5
#define GPP_B5
Definition:
gpio_soc_defs.h:58
GPP_B0
#define GPP_B0
Definition:
gpio_soc_defs.h:53
GPP_A11
#define GPP_A11
Definition:
gpio_soc_defs.h:130
GPP_C14
#define GPP_C14
Definition:
gpio_soc_defs.h:551
GPP_E20
#define GPP_E20
Definition:
gpio_soc_defs.h:648
GPP_A15
#define GPP_A15
Definition:
gpio_soc_defs.h:134
GPP_A9
#define GPP_A9
Definition:
gpio_soc_defs.h:128
GPP_E10
#define GPP_E10
Definition:
gpio_soc_defs.h:638
GPP_F8
#define GPP_F8
Definition:
gpio_soc_defs.h:581
GPP_C19
#define GPP_C19
Definition:
gpio_soc_defs.h:556
GPD8
#define GPD8
Definition:
gpio_soc_defs.h:389
GPP_A13
#define GPP_A13
Definition:
gpio_soc_defs.h:132
GPP_A21
#define GPP_A21
Definition:
gpio_soc_defs.h:140
GPP_B23
#define GPP_B23
Definition:
gpio_soc_defs.h:76
GPP_E15
#define GPP_E15
Definition:
gpio_soc_defs.h:643
GPP_B10
#define GPP_B10
Definition:
gpio_soc_defs.h:63
GPP_E16
#define GPP_E16
Definition:
gpio_soc_defs.h:644
GPP_D19
#define GPP_D19
Definition:
gpio_soc_defs.h:271
GPP_C1
#define GPP_C1
Definition:
gpio_soc_defs.h:538
GPP_F2
#define GPP_F2
Definition:
gpio_soc_defs.h:575
GPP_E11
#define GPP_E11
Definition:
gpio_soc_defs.h:639
GPD6
#define GPD6
Definition:
gpio_soc_defs.h:387
GPP_F18
#define GPP_F18
Definition:
gpio_soc_defs.h:591
GPP_B3
#define GPP_B3
Definition:
gpio_soc_defs.h:56
GPP_A22
#define GPP_A22
Definition:
gpio_soc_defs.h:141
GPP_F22
#define GPP_F22
Definition:
gpio_soc_defs.h:595
GPP_D15
#define GPP_D15
Definition:
gpio_soc_defs.h:267
GPP_F11
#define GPP_F11
Definition:
gpio_soc_defs.h:584
GPP_B21
#define GPP_B21
Definition:
gpio_soc_defs.h:74
GPD4
#define GPD4
Definition:
gpio_soc_defs.h:385
GPP_B4
#define GPP_B4
Definition:
gpio_soc_defs.h:57
GPP_D16
#define GPP_D16
Definition:
gpio_soc_defs.h:268
GPP_F3
#define GPP_F3
Definition:
gpio_soc_defs.h:576
GPP_E22
#define GPP_E22
Definition:
gpio_soc_defs.h:650
GPP_E21
#define GPP_E21
Definition:
gpio_soc_defs.h:649
GPP_C3
#define GPP_C3
Definition:
gpio_soc_defs.h:540
GPP_E12
#define GPP_E12
Definition:
gpio_soc_defs.h:640
GPP_A17
#define GPP_A17
Definition:
gpio_soc_defs.h:136
GPP_B17
#define GPP_B17
Definition:
gpio_soc_defs.h:70
GPP_E4
#define GPP_E4
Definition:
gpio_soc_defs.h:632
GPP_C0
#define GPP_C0
Definition:
gpio_soc_defs.h:537
GPD5
#define GPD5
Definition:
gpio_soc_defs.h:386
GPP_E1
#define GPP_E1
Definition:
gpio_soc_defs.h:629
GPP_F19
#define GPP_F19
Definition:
gpio_soc_defs.h:592
GPP_B7
#define GPP_B7
Definition:
gpio_soc_defs.h:60
GPP_D3
#define GPP_D3
Definition:
gpio_soc_defs.h:255
ARRAY_SIZE
#define ARRAY_SIZE(a)
Definition:
helpers.h:12
GPP_D23
#define GPP_D23
Definition:
gpio_soc_defs.h:133
GPP_G1
#define GPP_G1
Definition:
gpio_soc_defs.h:89
GPP_G7
#define GPP_G7
Definition:
gpio_soc_defs.h:95
GPP_D22
#define GPP_D22
Definition:
gpio_soc_defs.h:132
GPP_G4
#define GPP_G4
Definition:
gpio_soc_defs.h:92
GPP_G2
#define GPP_G2
Definition:
gpio_soc_defs.h:90
GPP_D21
#define GPP_D21
Definition:
gpio_soc_defs.h:131
GPP_G6
#define GPP_G6
Definition:
gpio_soc_defs.h:94
GPP_G0
#define GPP_G0
Definition:
gpio_soc_defs.h:88
GPP_D20
#define GPP_D20
Definition:
gpio_soc_defs.h:130
GPP_G3
#define GPP_G3
Definition:
gpio_soc_defs.h:91
GPP_G5
#define GPP_G5
Definition:
gpio_soc_defs.h:93
variant_configure_gpios
void variant_configure_gpios(void)
Definition:
gpio.c:238
gpio_table
static const struct pad_config gpio_table[]
Definition:
gpio.c:6
gpio_configure_pads
void gpio_configure_pads(const struct soc_amd_gpio *gpio_list_ptr, size_t size)
program a particular set of GPIO
Definition:
gpio.c:307
_PAD_CFG_STRUCT
#define _PAD_CFG_STRUCT(__pad, __config0, __config1)
Definition:
gpio_defs.h:166
pad_config
Definition:
gpio.h:75
src
mainboard
clevo
kbl-u
variants
n13xwu
gpio.c
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