Go to the source code of this file.
◆ DMA_TPG_FIFO_LEN
#define DMA_TPG_FIFO_LEN 64 |
◆ MAX_BIST_CONFIG
#define MAX_BIST_CONFIG 6 |
◆ MAX_CTRL_CONFIG
#define MAX_CTRL_CONFIG 4 |
◆ MAX_LANE_CONFIG
#define MAX_LANE_CONFIG 45 |
◆ MAX_REGULATOR_CONFIG
#define MAX_REGULATOR_CONFIG 7 |
◆ MAX_STRENGTH_CONFIG
#define MAX_STRENGTH_CONFIG 10 |
◆ MAX_TIMING_CONFIG
#define MAX_TIMING_CONFIG 40 |
◆ anonymous enum
Enumerator |
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DSI_PLL_TYPE_10NM | |
DSI_PLL_TYPE_MAX | |
Definition at line 31 of file dsi_phy.h.
◆ dsi_reg_mode
Enumerator |
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DSI_PHY_REGULATOR_DCDC_MODE | |
DSI_PHY_REGULATOR_LDO_MODE | |
Definition at line 26 of file dsi_phy.h.
◆ mdss_dsi_phy_10nm_init()