coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
uart.c File Reference
#include <device/mmio.h>
#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <fsp/soc_binding.h>
#include <commonlib/helpers.h>
#include <soc/bootblock.h>
#include <soc/gpio_defs.h>
#include <soc/uart.h>
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Macros

#define ELEM_OF_UART_TAB   ARRAY_SIZE(legacy_uart_ioadr_tab)
 

Functions

static void pci_early_hsuart_device_probe (u8 bus, u8 dev, u8 func, u32 mmio_base)
 
static void early_config_gpio (void)
 
void early_uart_init (void)
 

Variables

static uint16_t legacy_uart_ioadr_tab [] = {0x3F8, 0x2F8, 0x3E8, 0x2E8}
 

Macro Definition Documentation

◆ ELEM_OF_UART_TAB

#define ELEM_OF_UART_TAB   ARRAY_SIZE(legacy_uart_ioadr_tab)

Definition at line 15 of file uart.c.

Function Documentation

◆ early_config_gpio()

◆ early_uart_init()

void early_uart_init ( void  )

Definition at line 161 of file uart.c.

References BUILD_BUG_ON, DENVERTON_UARTS_TO_INI, early_config_gpio(), ELEM_OF_UART_TAB, legacy_uart_ioadr_tab, and pci_early_hsuart_device_probe().

Referenced by bootblock_soc_early_init().

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◆ pci_early_hsuart_device_probe()

static void pci_early_hsuart_device_probe ( u8  bus,
u8  dev,
u8  func,
u32  mmio_base 
)
static

Definition at line 17 of file uart.c.

References CONFIG, PCI_BASE_ADDRESS_0, PCI_BASE_ADDRESS_1, PCI_COMMAND, PCI_COMMAND_IO, PCI_COMMAND_MASTER, PCI_COMMAND_MEMORY, PCI_DEV, pci_read_config16(), pci_write_config16(), pci_write_config32(), PSR_OFFSET, and SIZE_OF_HSUART_RES.

Referenced by early_uart_init().

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Variable Documentation

◆ legacy_uart_ioadr_tab

uint16_t legacy_uart_ioadr_tab[] = {0x3F8, 0x2F8, 0x3E8, 0x2E8}
static

Definition at line 13 of file uart.c.

Referenced by early_uart_init().