4 #include <baseboard/gpio.h>
5 #include <baseboard/variants.h>
7 #include <vendorcode/google/chromeos/chromeos.h>
189 PAD_CFG_GPI_IRQ_WAKE(
GPIO_135,
NONE, DEEP, LEVEL, INVERT),
380 static const struct cros_gpio
cros_gpios[] = {
#define GPIO_COMM_SCC_NAME
const struct pad_config * variant_early_gpio_table(size_t *num)
DECLARE_WEAK_CROS_GPIOS(cros_gpios)
const struct pad_config *__weak variant_base_gpio_table(size_t *num)
const struct pad_config *__weak variant_sleep_gpio_table(size_t *num)
const struct pad_config *__weak variant_override_gpio_table(size_t *num)
const struct soc_amd_gpio *__weak variant_early_override_gpio_table(size_t *size)
const struct pad_config * mainboard_early_bootblock_gpio_table(size_t *num)
static const struct pad_config gpio_table[]
static const struct pad_config sleep_s5_gpio_table[]
static const struct pad_config early_bootblock_gpio_table[]
static const struct pad_config sleep_gpio_table[]
static const struct pad_config early_gpio_table[]
static const struct cros_gpio cros_gpios[]
const struct smm_save_state_ops *legacy_ops __weak
#define CROS_GPIO_DEVICE_NAME
#define PAD_CFG_GPI_APIC_IOS(pad, pull, rst, trig, inv, iosstate, iosterm)
#define PAD_CFG_GPI(pad, pull, rst)
#define PAD_CFG_GPI_SCI_LOW(pad, pull, rst, trig)
#define PAD_CFG_NF_IOSSTATE_IOSTERM(pad, pull, rst, func, iosstate, iosterm)
#define PAD_CFG_NF(pad, pull, rst, func)
#define PAD_CFG_NF_IOSSTATE(pad, pull, rst, func, iosstate)
#define PAD_CFG_GPI_SCI_HIGH_DEBEN(pad, pull, rst, trig, dur)
#define PAD_CFG_GPO_IOSSTATE_IOSTERM(pad, val, rst, pull, iosstate, ioterm)
#define PAD_CFG_GPO(pad, val, rst)
#define PAD_CFG_GPI_APIC_LOW(pad, pull, rst)
#define PAD_CFG_GPI_GPIO_DRIVER(pad, pull, rst)
#define PAD_CFG_GPI_SCI_IOS(pad, pull, rst, trig, inv, iosstate, iosterm)
#define PAD_CFG_NF_IOSTANDBY_IGNORE(pad, pull, rst, func)