coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
cstates.c
Go to the documentation of this file.
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <
acpi/acpigen.h
>
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#include <
southbridge/intel/i82801gx/i82801gx.h
>
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static
const
acpi_cstate_t
cst_entries
[] = {
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{
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/* ACPI C1 / CPU C1 */
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1, 0x01, 1000,
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{
ACPI_ADDRESS_SPACE_FIXED
, 1, 2, 1, 0, 0 }
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},
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{
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/* ACPI C2 / CPU C2 */
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2, 0x01, 500,
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{
ACPI_ADDRESS_SPACE_IO
, 8, 0, 0,
DEFAULT_PMBASE
+
LV2
, 0 }
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},
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{
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/* ACPI C3 / CPU C2 */
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2, 0x11, 250,
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{
ACPI_ADDRESS_SPACE_IO
, 8, 0, 0,
DEFAULT_PMBASE
+
LV3
, 0 }
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},
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};
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int
get_cst_entries
(
const
acpi_cstate_t
**entries)
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{
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*entries =
cst_entries
;
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return
ARRAY_SIZE
(
cst_entries
);
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}
get_cst_entries
int get_cst_entries(const acpi_cstate_t **entries)
Definition:
cstates.c:5
ARRAY_SIZE
#define ARRAY_SIZE(a)
Definition:
helpers.h:12
cst_entries
static const acpi_cstate_t cst_entries[]
Definition:
cstates.c:6
i82801gx.h
ACPI_ADDRESS_SPACE_IO
#define ACPI_ADDRESS_SPACE_IO
Definition:
acpi.h:105
ACPI_ADDRESS_SPACE_FIXED
#define ACPI_ADDRESS_SPACE_FIXED
Definition:
acpi.h:115
acpigen.h
DEFAULT_PMBASE
#define DEFAULT_PMBASE
Definition:
iomap.h:14
LV3
#define LV3
Definition:
pch.h:429
LV2
#define LV2
Definition:
pch.h:428
acpi_cstate
Definition:
acpi.h:983
src
mainboard
getac
p470
cstates.c
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