![]() |
coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
|
#include <types.h>
#include <console/console.h>
#include <acpi/acpi.h>
#include <acpi/acpigen.h>
#include <arch/cpu.h>
#include <cpu/x86/msr.h>
#include <cpu/intel/speedstep.h>
#include <cpu/intel/turbo.h>
#include <device/device.h>
#include "haswell.h"
#include "chip.h"
#include <southbridge/intel/lynxpoint/pch.h>
Go to the source code of this file.
Macros | |
#define | MWAIT_RES(state, sub_state) |
Functions | |
static int | get_logical_cores_per_package (void) |
static void | generate_T_state_entries (int core, int cores_per_package) |
static bool | is_s0ix_enabled (void) |
static void | generate_C_state_entries (void) |
static int | calculate_power (int tdp, int p1_ratio, int ratio) |
static void | generate_P_state_entries (int core, int cores_per_package) |
void | generate_cpu_entries (const struct device *device) |
Variables | |
static acpi_cstate_t | cstate_map [NUM_C_STATES] |
static const int | cstate_set_s0ix [3] |
static const int | cstate_set_lp [3] |
static const int | cstate_set_trad [3] |
static acpi_tstate_t | tss_table_fine [] |
static acpi_tstate_t | tss_table_coarse [] |
struct chip_operations | cpu_intel_haswell_ops |
#define MWAIT_RES | ( | state, | |
sub_state | |||
) |
|
static |
Definition at line 207 of file acpi.c.
Referenced by generate_P_state_entries().
Definition at line 181 of file acpi.c.
References acpigen_write_CST_package(), ARRAY_SIZE, count, cstate_map, cstate_set_lp, cstate_set_s0ix, cstate_set_trad, acpi_cstate::ctype, haswell_is_ult(), and is_s0ix_enabled().
Definition at line 334 of file acpi.c.
Referenced by cpu_fill_ssdt(), and mc_gen_ssdt().
|
static |
Definition at line 228 of file acpi.c.
References acpigen_pop_len(), acpigen_write_empty_PCT(), acpigen_write_name(), acpigen_write_package(), acpigen_write_PPC_NVS(), acpigen_write_PSD_package(), acpigen_write_PSS_package(), calculate_power(), CPU_BCLK, cpu_config_tdp_levels(), get_turbo_state(), msr_struct::hi, HW_ALL, msr_struct::lo, MISC_PWR_MGMT_EIST_HW_DIS, MSR_CONFIG_TDP_NOMINAL, MSR_MISC_PWR_MGMT, MSR_PKG_POWER_SKU, MSR_PKG_POWER_SKU_UNIT, MSR_PLATFORM_INFO, MSR_TURBO_RATIO_LIMIT, power, PSS_LATENCY_BUSMASTER, PSS_LATENCY_TRANSITION, PSS_MAX_ENTRIES, PSS_RATIO_STEP, rdmsr(), SW_ANY, and TURBO_ENABLED.
|
static |
Definition at line 143 of file acpi.c.
References acpigen_write_empty_PTC(), acpigen_write_TPC(), acpigen_write_TSD_package(), acpigen_write_TSS_package(), ARRAY_SIZE, cpuid_eax(), SW_ALL, tss_table_coarse, and tss_table_fine.
|
static |
Definition at line 108 of file acpi.c.
References msr_struct::lo, MSR_CORE_THREAD_COUNT, and rdmsr().
Definition at line 166 of file acpi.c.
References device::chip_info, dev_find_lapic(), haswell_is_ult(), cpu_intel_haswell_config::s0ix_enable, and SPEEDSTEP_APIC_MAGIC.
Referenced by generate_C_state_entries().
struct chip_operations cpu_intel_haswell_ops |
|
static |
Definition at line 26 of file acpi.c.
Referenced by generate_C_state_entries().
|
static |
|
static |
Definition at line 90 of file acpi.c.
Referenced by generate_C_state_entries().
|
static |
Definition at line 102 of file acpi.c.
Referenced by generate_C_state_entries().
|
static |
Definition at line 132 of file acpi.c.
Referenced by generate_T_state_entries().
|
static |
Definition at line 114 of file acpi.c.
Referenced by generate_T_state_entries().