coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <assert.h>
#include <bootblock_common.h>
#include <device/pci.h>
#include <device/pci_ops.h>
#include <FsptUpd.h>
#include <intelblocks/fast_spi.h>
#include <soc/bootblock.h>
#include <soc/pci_devs.h>
#include <soc/systemagent.h>
#include <spi-generic.h>
#include <stdint.h>
#include <console/console.h>
Go to the source code of this file.
Functions | |
asmlinkage void | bootblock_c_entry (uint64_t base_timestamp) |
static void | sanity_check_pci_mmconf (void) |
void | bootblock_soc_early_init (void) |
void | bootblock_soc_init (void) |
Variables | |
const FSPT_UPD | temp_ram_init_params |
asmlinkage void bootblock_c_entry | ( | uint64_t | base_timestamp | ) |
Definition at line 49 of file bootblock.c.
References bootblock_main_with_basetime().
Definition at line 81 of file bootblock.c.
References DEFAULT_SPI_BASE, early_uart_init(), and fast_spi_early_init().
Definition at line 90 of file bootblock.c.
References BIOS_DEBUG, CONFIG, printk, and sanity_check_pci_mmconf().
Definition at line 55 of file bootblock.c.
References assert, base, length, MASK_PCIEXBAR_128M, MASK_PCIEXBAR_256M, MASK_PCIEXBAR_64M, MASK_PCIEXBAR_LENGTH, MASK_PCIEXBAR_LENGTH_128M, MASK_PCIEXBAR_LENGTH_256M, MASK_PCIEXBAR_LENGTH_64M, PCH_SA_DEV, pci_io_read_config32(), and PCIEXBAR.
Referenced by bootblock_soc_init().
const FSPT_UPD temp_ram_init_params |
Definition at line 16 of file bootblock.c.