coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
superio.c File Reference
#include <device/device.h>
#include <device/pnp.h>
#include <superio/conf_mode.h>
#include <pc80/keyboard.h>
#include "w83627dhg.h"
Include dependency graph for superio.c:

Go to the source code of this file.

Functions

static void w83627dhg_enable_UR2 (struct device *dev)
 
static void w83627dhg_init (struct device *dev)
 
static void enable_dev (struct device *dev)
 

Variables

static struct device_operations ops
 
static struct pnp_info pnp_dev_info []
 
struct chip_operations superio_winbond_w83627dhg_ops
 

Function Documentation

◆ enable_dev()

static void enable_dev ( struct device dev)
static

Definition at line 65 of file superio.c.

References ARRAY_SIZE, ops, pnp_dev_info, and pnp_enable_devices().

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◆ w83627dhg_enable_UR2()

static void w83627dhg_enable_UR2 ( struct device dev)
static

Definition at line 10 of file superio.c.

References pnp_enter_conf_mode(), pnp_exit_conf_mode(), pnp_read_config(), and pnp_write_config().

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◆ w83627dhg_init()

static void w83627dhg_init ( struct device dev)
static

Definition at line 21 of file superio.c.

Variable Documentation

◆ ops

struct device_operations ops
static
Initial value:
= {
.read_resources = pnp_read_resources,
.set_resources = pnp_set_resources,
.enable_resources = pnp_enable_resources,
.enable = pnp_alt_enable,
.init = w83627dhg_init,
.ops_pnp_mode = &pnp_conf_mode_8787_aa,
}
const struct pnp_mode_ops pnp_conf_mode_8787_aa
Definition: conf_mode.c:202
void pnp_read_resources(struct device *dev)
Definition: pnp_device.c:114
void pnp_set_resources(struct device *dev)
Definition: pnp_device.c:157
void pnp_alt_enable(struct device *dev)
Definition: pnp_device.c:191
void pnp_enable_resources(struct device *dev)
Definition: pnp_device.c:173
static void w83627dhg_init(struct device *dev)
Definition: superio.c:21

Definition at line 21 of file superio.c.

Referenced by enable_dev().

◆ pnp_dev_info

struct pnp_info pnp_dev_info[]
static
Initial value:
= {
{ NULL, W83627DHG_SP1, PNP_IO0 | PNP_IRQ0, 0x07f8, },
{ NULL, W83627DHG_SP2, PNP_IO0 | PNP_IRQ0, 0x07f8, },
0x07ff, 0x07ff, },
{ NULL, W83627DHG_SPI, PNP_IO1, 0, 0x7f8, },
{ NULL, W83627DHG_HWM, PNP_IO0 | PNP_IRQ0, 0x07fe, },
}
#define PNP_IRQ1
Definition: pnp.h:48
#define PNP_DRQ0
Definition: pnp.h:49
#define PNP_IO1
Definition: pnp.h:43
#define PNP_IO0
Definition: pnp.h:42
#define PNP_IRQ0
Definition: pnp.h:47
#define NULL
Definition: stddef.h:19
#define W83627DHG_WDTO_PLED
Definition: w83627dhg.h:14
#define W83627DHG_PP
Definition: w83627dhg.h:9
#define W83627DHG_SPI
Definition: w83627dhg.h:13
#define W83627DHG_SP1
Definition: w83627dhg.h:10
#define W83627DHG_PECI_SST
Definition: w83627dhg.h:17
#define W83627DHG_GPIO4
Definition: w83627dhg.h:33
#define W83627DHG_FDC
Definition: w83627dhg.h:8
#define W83627DHG_GPIO6
Definition: w83627dhg.h:29
#define W83627DHG_GPIO3
Definition: w83627dhg.h:32
#define W83627DHG_GPIO5
Definition: w83627dhg.h:34
#define W83627DHG_GPIO2
Definition: w83627dhg.h:31
#define W83627DHG_KBC
Definition: w83627dhg.h:12
#define W83627DHG_ACPI
Definition: w83627dhg.h:15
#define W83627DHG_SP2
Definition: w83627dhg.h:11
#define W83627DHG_HWM
Definition: w83627dhg.h:16

Definition at line 21 of file superio.c.

Referenced by enable_dev().

◆ superio_winbond_w83627dhg_ops

struct chip_operations superio_winbond_w83627dhg_ops
Initial value:
= {
.enable_dev = enable_dev,
}
static void enable_dev(struct device *dev)
Definition: superio.c:65

Definition at line 65 of file superio.c.