coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
superio.c
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <device/device.h>
4 #include <device/pnp.h>
5 #include <superio/conf_mode.h>
6 #include <pc80/keyboard.h>
7 
8 #include "w83627dhg.h"
9 
10 static void w83627dhg_enable_UR2(struct device *dev)
11 {
12  u8 reg8;
13 
15  reg8 = pnp_read_config(dev, 0x2c);
16  reg8 |= (0x3);
17  pnp_write_config(dev, 0x2c, reg8); // Set pins 78-85-> UART B
18  pnp_exit_conf_mode(dev);
19 }
20 
21 static void w83627dhg_init(struct device *dev)
22 {
23 
24  if (!dev->enabled)
25  return;
26 
27  switch (dev->path.pnp.device) {
28  case W83627DHG_SP2:
30  break;
31  case W83627DHG_KBC:
33  break;
34  }
35 }
36 
37 static struct device_operations ops = {
39  .set_resources = pnp_set_resources,
40  .enable_resources = pnp_enable_resources,
41  .enable = pnp_alt_enable,
42  .init = w83627dhg_init,
43  .ops_pnp_mode = &pnp_conf_mode_8787_aa,
44 };
45 
46 static struct pnp_info pnp_dev_info[] = {
47  { NULL, W83627DHG_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
48  { NULL, W83627DHG_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
49  { NULL, W83627DHG_SP1, PNP_IO0 | PNP_IRQ0, 0x07f8, },
50  { NULL, W83627DHG_SP2, PNP_IO0 | PNP_IRQ0, 0x07f8, },
52  0x07ff, 0x07ff, },
53  { NULL, W83627DHG_SPI, PNP_IO1, 0, 0x7f8, },
54  { NULL, W83627DHG_GPIO6, },
56  { NULL, W83627DHG_GPIO2, },
57  { NULL, W83627DHG_GPIO3, },
58  { NULL, W83627DHG_GPIO4, },
59  { NULL, W83627DHG_GPIO5, },
61  { NULL, W83627DHG_HWM, PNP_IO0 | PNP_IRQ0, 0x07fe, },
63 };
64 
65 static void enable_dev(struct device *dev)
66 {
68 }
69 
71  CHIP_NAME("Winbond W83627DHG Super I/O")
72  .enable_dev = enable_dev,
73 };
#define ARRAY_SIZE(a)
Definition: helpers.h:12
const struct pnp_mode_ops pnp_conf_mode_8787_aa
Definition: conf_mode.c:202
#define CHIP_NAME(X)
Definition: device.h:32
uint8_t pc_keyboard_init(uint8_t probe_aux)
Definition: keyboard.c:229
#define NO_AUX_DEVICE
Definition: keyboard.h:6
#define PNP_IRQ1
Definition: pnp.h:48
#define PNP_DRQ0
Definition: pnp.h:49
#define PNP_IO1
Definition: pnp.h:43
#define PNP_IO0
Definition: pnp.h:42
#define PNP_IRQ0
Definition: pnp.h:47
void pnp_exit_conf_mode(struct device *dev)
Definition: pnp_device.c:17
void pnp_read_resources(struct device *dev)
Definition: pnp_device.c:114
void pnp_enable_devices(struct device *base_dev, struct device_operations *ops, unsigned int functions, struct pnp_info *info)
Definition: pnp_device.c:371
void pnp_set_resources(struct device *dev)
Definition: pnp_device.c:157
void pnp_alt_enable(struct device *dev)
Definition: pnp_device.c:191
u8 pnp_read_config(struct device *dev, u8 reg)
Definition: pnp_device.c:44
void pnp_enter_conf_mode(struct device *dev)
Definition: pnp_device.c:11
void pnp_write_config(struct device *dev, u8 reg, u8 value)
Definition: pnp_device.c:38
void pnp_enable_resources(struct device *dev)
Definition: pnp_device.c:173
#define NULL
Definition: stddef.h:19
uint8_t u8
Definition: stdint.h:45
void(* read_resources)(struct device *dev)
Definition: device.h:39
struct pnp_path pnp
Definition: path.h:117
Definition: device.h:107
struct device_path path
Definition: device.h:115
unsigned int enabled
Definition: device.h:122
Definition: pnp.h:37
unsigned int device
Definition: path.h:59
#define W83627DHG_WDTO_PLED
Definition: w83627dhg.h:14
#define W83627DHG_PP
Definition: w83627dhg.h:9
#define W83627DHG_SPI
Definition: w83627dhg.h:13
#define W83627DHG_SP1
Definition: w83627dhg.h:10
#define W83627DHG_PECI_SST
Definition: w83627dhg.h:17
#define W83627DHG_GPIO4
Definition: w83627dhg.h:33
#define W83627DHG_FDC
Definition: w83627dhg.h:8
#define W83627DHG_GPIO6
Definition: w83627dhg.h:29
#define W83627DHG_GPIO3
Definition: w83627dhg.h:32
#define W83627DHG_GPIO5
Definition: w83627dhg.h:34
#define W83627DHG_GPIO2
Definition: w83627dhg.h:31
#define W83627DHG_KBC
Definition: w83627dhg.h:12
#define W83627DHG_ACPI
Definition: w83627dhg.h:15
#define W83627DHG_SP2
Definition: w83627dhg.h:11
#define W83627DHG_HWM
Definition: w83627dhg.h:16
struct chip_operations superio_winbond_w83627dhg_ops
Definition: superio.c:70
static void w83627dhg_enable_UR2(struct device *dev)
Definition: superio.c:10
static void enable_dev(struct device *dev)
Definition: superio.c:65
static struct device_operations ops
Definition: superio.c:37
static struct pnp_info pnp_dev_info[]
Definition: superio.c:46
static void w83627dhg_init(struct device *dev)
Definition: superio.c:21