coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
gpio.h
Go to the documentation of this file.
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #ifndef SOC_MEDIATEK_MT8192_GPIO_H
4 #define SOC_MEDIATEK_MT8192_GPIO_H
5 
6 #include <soc/addressmap.h>
7 #include <soc/gpio_common.h>
8 #include <types.h>
9 
10 enum {
11  MAX_GPIO_REG_BITS = 32,
12  MAX_GPIO_MODE_PER_REG = 8,
13  GPIO_MODE_BITS = 4,
14 };
15 
16 #define PIN(id, name, flag, bit, base, offset, \
17  func1, func2, func3, func4, func5, func6, func7) \
18  PAD_##name##_ID = id, \
19  PAD_##name##_FLAG = flag, \
20  PAD_##name##_BIT = bit, \
21  PAD_##name##_BASE = base, \
22  PAD_##name##_OFFSET = offset, \
23  PAD_##name##_FUNC_##func1 = 1, \
24  PAD_##name##_FUNC_##func2 = 2, \
25  PAD_##name##_FUNC_##func3 = 3, \
26  PAD_##name##_FUNC_##func4 = 4, \
27  PAD_##name##_FUNC_##func5 = 5, \
28  PAD_##name##_FUNC_##func6 = 6, \
29  PAD_##name##_FUNC_##func7 = 7
30 
31 #define GPIO(name) ((gpio_t){ \
32  .id = PAD_##name##_ID, \
33  .flag = PAD_##name##_FLAG, \
34  .bit = PAD_##name##_BIT, \
35  .base = PAD_##name##_BASE, \
36  .offset = PAD_##name##_OFFSET \
37  })
38 
39 enum {
40  PIN(0, EINT0, 0, 9, 0x23, 0xb0,
41  SPI6_CLK, I2S5_MCK, PWM_0, TDM_LRCK,
42  TP_GPIO0_AO, MD_INT0, RES7),
43  PIN(1, EINT1, 0, 10, 0x23, 0xb0,
44  SPI6_CSB, I2S5_BCK, PWM_1, TDM_BCK,
45  TP_GPIO1_AO, MD_INT1_C2K_UIM0_HOT_PLUG, DBG_MON_A9),
46  PIN(2, EINT2, 0, 11, 0x23, 0xb0,
47  SPI6_MI, I2S5_LRCK, PWM_2, TDM_MCK,
48  TP_GPIO2_AO, MD_INT2_C2K_UIM1_HOT_PLUG, DBG_MON_A10),
49  PIN(3, EINT3, 0, 12, 0x23, 0xb0,
50  SPI6_MO, I2S5_DO, PWM_3, TDM_DATA0,
51  TP_GPIO3_AO, CLKM0, DBG_MON_A11),
52  PIN(4, EINT4, 0, 13, 0x23, 0xb0,
53  SPI4_A_CLK, I2S2_MCK, DMIC1_CLK, TDM_DATA1,
54  TP_GPIO4_AO, PCM1_DI, IDDIG),
55  PIN(5, EINT5, 0, 14, 0x23, 0xb0,
56  SPI4_A_CSB, I2S2_BCK, DMIC1_DAT,
57  TDM_DATA2, TP_GPIO5_AO, PCM1_CLK, USB_DRVVBUS),
58  PIN(6, EINT6, 0, 15, 0x23, 0xb0,
59  SPI4_A_MI, I2S2_LRCK, DMIC_CLK, TDM_DATA3,
60  TP_GPIO6_AO, PCM1_SYNC, RES7),
61  PIN(7, EINT7, 0, 16, 0x23, 0xb0,
62  SPI4_A_MO, I2S2_DI, DMIC_DAT, WIFI_TXD,
63  TP_GPIO7_AO, PCM1_DO0, RES7),
64  PIN(8, EINT8, 0, 17, 0x23, 0xb0,
65  SRCLKENAI1, I2S2_DI2, KPCOL2,
66  CONN_TCXOENA_REQ, CLKM1, PCM1_DO1, DBG_MON_A12),
67  PIN(9, EINT9, 0, 18, 0x23, 0xb0,
68  SRCLKENAI0, DVFSRC_EXT_REQ, KPROW2,
69  CMMCLK4, CLKM3, PCM1_DO2, DBG_MON_A13),
70  PIN(10, EINT10, 1, 0, 0x15, 0x20,
71  MSDC2_CLK, SPI4_B_CLK, I2S8_MCK,
72  RES4, MD_INT0, TP_GPIO8_AO, RES7),
73  PIN(11, EINT11, 1, 1, 0x15, 0x20,
74  MSDC2_CMD, SPI4_B_CSB, I2S8_BCK, PCIE_CLKREQ_N,
75  MD_INT1_C2K_UIM0_HOT_PLUG, TP_GPIO9_AO, RES7),
76  PIN(12, EINT12, 1, 2, 0x15, 0x20,
77  MSDC2_DAT3, SPI4_B_MI, I2S8_LRCK, DMIC1_CLK,
78  MD_INT2_C2K_UIM1_HOT_PLUG, TP_GPIO10_AO, RES7),
79  PIN(13, EINT13, 1, 3, 0x15, 0x20,
80  DMSDC2_DAT0, SPI4_B_MO, I2S8_DI, DMIC1_DAT,
81  ANT_SEL10, TP_GPIO11_AO, RES7),
82  PIN(14, EINT14, 1, 4, 0x15, 0x20,
83  MSDC2_DAT2, IDDIG, SCL_6306, PCIE_PERESET_N,
84  ANT_SEL11, TP_GPIO12_AO, RES7),
85  PIN(15, EINT15, 1, 5, 0x15, 0x20,
86  MSDC2_DAT1, USB_DRVVBUS, SDA_6306,
87  PCIE_WAKE_N, ANT_SEL12, TP_GPIO13_AO, RES7),
88  PIN(16, EINT16, 0, 2, 0x17, 0x50,
89  SRCLKENAI1, IDDIG, TP_GPIO14_AO, KPCOL2,
90  GPS_L1_ELNA_EN, SPI7_A_MI, DBG_MON_A0),
91  PIN(17, EINT17, 0, 3, 0x17, 0x50,
92  SRCLKENAI0, USB_DRVVBUS, TP_GPIO15_AO,
93  KPROW2, RES5, SPI7_A_MO, DBG_MON_A1),
94  PIN(18, EINT18, 0, 21, 0x36, 0xa0,
95  SRCLKENAI0, SPI4_C_MI, SPI1_B_MI,
96  GPS_L1_ELNA_EN, ANT_SEL10, MD_INT0, DBG_MON_B2),
97  PIN(19, EINT19, 0, 22, 0x36, 0xa0,
98  SRCLKENAI1, SPI4_C_MO, SPI1_B_MO, RES4,
99  ANT_SEL11, MD_INT1_C2K_UIM0_HOT_PLUG, DBG_MON_B3),
100  PIN(20, EINT20, 0, 23, 0x36, 0xa0,
101  SRCLKENAI0, SPI4_C_CLK, SPI1_B_CLK, PWM_3,
102  ANT_SEL12, MD_INT2_C2K_UIM1_HOT_PLUG, DBG_MON_B4),
103  PIN(21, EINT21, 0, 24, 0x36, 0xa0,
104  RES1, SPI4_C_CSB, SPI1_B_CSB, RES4,
105  RES5, IDDIG, DBG_MON_B5),
106  PIN(22, EINT22, 0, 3, 0x21, 0x90,
107  RES1, SPI0_C_CLK, SPI7_B_CLK, I2S7_BCK,
108  I2S9_BCK, SCL_6306, RES7),
109  PIN(23, EINT23, 0, 4, 0x21, 0x90,
110  RES1, SPI0_C_CSB, SPI7_B_CSB, I2S7_LRCK,
111  I2S9_LRCK, SDA_6306, RES7),
112  PIN(24, EINT24, 0, 5, 0x21, 0x90,
113  SRCLKENAI1, SPI0_C_MI, SPI7_B_MI, I2S6_DI,
114  I2S8_DI, SPINOR_CS, RES7),
115  PIN(25, EINT25, 0, 6, 0x21, 0x90,
116  SRCLKENAI0, SPI0_C_MO, SPI7_B_MO,
117  I2S7_DO, I2S9_DO, SPINOR_CK, RES7),
118  PIN(26, PERIPHERAL_EN4, 0, 5, 0x22, 0x80,
119  PWM_2, CLKM0, USB_DRVVBUS, SPI5_C_MI,
120  I2S9_BCK, RES6, RES7),
121  PIN(27, PERIPHERAL_EN5, 0, 6, 0x22, 0x80,
122  PWM_3, CLKM1, RES3, SPI5_C_MO,
123  I2S9_LRCK, SPINOR_IO0, RES7),
124  PIN(28, PERIPHERAL_EN6, 0, 7, 0x22, 0x80,
125  PWM_0, CLKM2, RES3, SPI5_C_CSB,
126  I2S9_MCK, SPINOR_IO1, RES7),
127  PIN(29, PERIPHERAL_EN7, 0, 8, 0x22, 0x80,
128  PWM_1, CLKM3, RES3, SPI5_C_CLK,
129  I2S9_DO, SPINOR_IO2, RES7),
130  PIN(30, PERIPHERAL_EN8, 0, 9, 0x22, 0x80,
131  PWM_2, CLKM0, GPS_L1_ELNA_EN, I2S7_MCK,
132  I2S9_MCK, SPINOR_IO3, RES7),
133  PIN(31, I2S3_MCK, 0, 27, 0x22, 0x70,
134  I2S3_MCK, I2S1_MCK, I2S5_MCK,
135  SRCLKENAI0, I2S0_MCK, RES6, RES7),
136  PIN(32, I2S3_BCK, 0, 24, 0x22, 0x70,
137  I2S3_BCK, I2S1_BCK, I2S5_BCK,
138  PCM0_CLK, I2S0_BCK, RES6, RES7),
139  PIN(33, I2S3_LRCK, 0, 26, 0x22, 0x70,
140  I2S3_LRCK, I2S1_LRCK, I2S5_LRCK,
141  PCM0_SYNC, I2S0_LRCK, RES6, RES7),
142  PIN(34, I2S0_DI, 0, 23, 0x22, 0x70,
143  I2S3_DO, I2S1_DO, I2S5_DO, PCM0_DO,
144  RES5, RES6, RES7),
145  PIN(35, I2S3_DO, 0, 25, 0x22, 0x70,
146  I2S3_DO, I2S1_DO, I2S5_DO,
147  PCM0_DO, RES5, RES6, RES7),
148  PIN(36, SPI5_CLK, 0, 20, 0x21, 0x90,
149  SPI5_A_CLK, DMIC1_CLK, RES3,
150  MD_URXD0, UCTS0, URXD1, RES7),
151  PIN(37, SPI5_CSB, 0, 21, 0x21, 0x90,
152  SPI5_A_CSB, DMIC1_DAT, RES3,
153  MD_UTXD0, URTS0, UTXD1, RES7),
154  PIN(38, SPI5_MI, 0, 22, 0x21, 0x90,
155  SPI5_A_MI, DMIC_CLK, RES3,
156  MD_URXD1, URXD0, UCTS1, RES7),
157  PIN(39, SPI5_MO, 0, 23, 0x21, 0x90,
158  SPI5_A_MO, DMIC_DAT, RES3,
159  MD_UTXD1, UTXD0, URTS1, RES7),
160  PIN(40, DISP_PWM, 0, 0, 0x17, 0x50,
161  DISP_PWM, RES2, RES3, RES4,
162  RES5, RES6, DBG_MON_A6),
163  PIN(41, DSI_TE, 0, 1, 0x17, 0x50,
164  DSI_TE, RES2, RES3, RES4,
165  RES5, RES6, DBG_MON_A7),
166  PIN(42, LCM_RST, 0, 4, 0x17, 0x50,
167  LCM_RST, RES2, RES3, RES4,
168  RES5, RES6, DBG_MON_A8),
169  PIN(43, INT_SIM1, 0, 25, 0x36, 0xa0,
170  MD_INT1_C2K_UIM0_HOT_PLUG, MD_INT2_C2K_UIM1_HOT_PLUG,
171  SCL_6306, ADSP_URXD0, PTA_RXD, SSPM_URXD_AO, DBG_MON_B0),
172  PIN(44, INT_SIM2, 0, 26, 0x36, 0xa0,
173  MD_INT2_C2K_UIM1_HOT_PLUG, MD_INT1_C2K_UIM0_HOT_PLUG,
174  SDA_6306, ADSP_UTXD0, PTA_TXD, SSPM_UTXD_AO, DBG_MON_B1),
175  PIN(45, SIM2_SCLK, 1, 9, 0x20, 0x60,
176  MD1_SIM2_SCLK, MD1_SIM1_SCLK, MCUPM_JTAG_TDI,
177  APU_JTAG_TDI, CCU_JTAG_TDI, LVTS_SCK, CONN_DSP_JDI),
178  PIN(46, SIM2_SRST, 1, 11, 0x20, 0x60,
179  MD1_SIM2_SRST, MD1_SIM1_SRST, MCUPM_JTAG_TMS,
180  APU_JTAG_TMS, CCU_JTAG_TMS, LVTS_SDI, CONN_DSP_JMS),
181  PIN(47, SIM2_SIO, 1, 10, 0x20, 0x60,
182  MD1_SIM2_SIO, MD1_SIM1_SIO, MCUPM_JTAG_TDO,
183  APU_JTAG_TDO, CCU_JTAG_TDO, LVTS_SCF, CONN_DSP_JDO),
184  PIN(48, SIM1_SIO, 1, 7, 0x20, 0x60,
185  MD1_SIM1_SIO, MD1_SIM2_SIO, MCUPM_JTAG_TRSTN,
186  APU_JTAG_TRST, CCU_JTAG_TRST, LVTS_FOUT, CONN_DSP_JINTP),
187  PIN(49, SIM1_SRST, 1, 8, 0x20, 0x60,
188  MD1_SIM1_SRST, MD1_SIM2_SRST, MCUPM_JTAG_TCK,
189  APU_JTAG_TCK, CCU_JTAG_TCK, LVTS_SDO, CONN_DSP_JCK),
190  PIN(50, SIM1_SCLK, 1, 6, 0x20, 0x60,
191  MD1_SIM1_SCLK, MD1_SIM2_SCLK, RES3,
192  RES4, RES5, LVTS_26M, RES7),
193  PIN(51, MSDC1_CLK, 1, 0, 0x20, 0x60,
194  MSDC1_CLK, PCM1_CLK, CONN_DSP_JCK, UDI_TCK,
195  IPU_JTAG_TCK, SSPM_JTAG_TCK, JTCK_SEL3),
196  PIN(52, MSDC1_CMD, 1, 1, 0x20, 0x60,
197  MSDC1_CMD, PCM1_SYNC, CONN_DSP_JMS, UDI_TMS,
198  IPU_JTAG_TMS, SSPM_JTAG_TMS, JTMS_SEL3),
199  PIN(53, MSDC1_DAT3, 1, 5, 0x20, 0x60,
200  MSDC1_DAT3, PCM1_DI, CONN_DSP_JINTP,
201  CONN_MCU_AICE_TMSC, RES5, RES6, RES7),
202  PIN(54, MSDC1_DAT0, 1, 2, 0x20, 0x60,
203  MSDC1_DAT0, PCM1_DO0, CONN_DSP_JDI,
204  UDI_TDI, IPU_JTAG_TDI, SSPM_JTAG_TDI, JTDI_SEL3),
205  PIN(55, MSDC1_DAT2, 1, 4, 0x20, 0x60,
206  MSDC1_DAT2, PCM1_DO2, CONN_MCU_AICE_TCKC,
207  UDI_NTRST, IPU_JTAG_TRST, SSPM_JTAG_TRSTN, JTRSTN_SEL3),
208  PIN(56, MSDC1_DAT1, 1, 3, 0x20, 0x60,
209  MSDC1_DAT1, PCM1_DO1, CONN_DSP_JDO, UDI_TDO,
210  IPU_JTAG_TDO, SSPM_JTAG_TDO, JTDO_SEL3),
211  PIN(57, MIPI2_D_SCLK, 0, 1, 0x22, 0x80,
212  MIPI2_D_SCLK, RES2, RES3, RES4,
213  RES5, RES6, RES7),
214  PIN(58, MIPI2_D_SDATA, 0, 2, 0x22, 0x80,
215  MIPI2_D_SDATA, RES2, RES3,
216  RES4, RES5, RES6, RES7),
217  PIN(59, MIPI_M_SCLK, 0, 3, 0x22, 0x80,
218  MIPI_M_SCLK, RES2, RES3,
219  RES4, RES5, RES6, RES7),
220  PIN(60, MIPI_M_SDATA, 0, 4, 0x22, 0x80,
221  MIPI_M_SDATA, RES2, RES3,
222  RES4, RES5, RES6, RES7),
223  PIN(61, MD_UCNT, 0, 28, 0x22, 0x70,
224  MD_UCNT_A_TGL, RES2, RES3,
225  RES4, RES5, RES6, RES7),
226  PIN(62, DIGRF_IRQ, 0, 22, 0x22, 0x70,
227  DIGRF_IRQ, RES2, RES3,
228  RES4, RES5, RES6, RES7),
229  PIN(63, BPI_D_BUS0, 0, 0, 0x22, 0x70,
230  BPI_BUS0, RES2, PCIE_WAKE_N,
231  RES4, RES5, RES6, RES7),
232  PIN(64, BPI_D_BUS1, 0, 1, 0x22, 0x70,
233  BPI_BUS1, RES2, PCIE_PERESET_N,
234  RES4, RES5, RES6, RES7),
235  PIN(65, BPI_D_BUS2, 0, 12, 0x22, 0x70,
236  BPI_BUS2, RES2, PCIE_CLKREQ_N,
237  RES4, RES5, RES6, RES7),
238  PIN(66, BPI_D_BUS3, 0, 15, 0x22, 0x70,
239  BPI_BUS3, RES2, RES3,
240  RES4, RES5, RES6, RES7),
241  PIN(67, BPI_D_BUS4, 0, 16, 0x22, 0x70,
242  BPI_BUS4, RES2, RES3,
243  RES4, RES5, RES6, RES7),
244  PIN(68, BPI_D_BUS5, 0, 17, 0x22, 0x70,
245  BPI_BUS5, RES2, RES3,
246  RES4, RES5, RES6, RES7),
247  PIN(69, BPI_D_BUS6, 0, 18, 0x22, 0x70,
248  BPI_BUS6, CONN_BPI_BUS6,
249  RES3, RES4, RES5, RES6, RES7),
250  PIN(70, BPI_D_BUS7, 0, 19, 0x22, 0x70,
251  BPI_BUS7, CONN_BPI_BUS7, RES3,
252  RES4, RES5, RES6, RES7),
253  PIN(71, BPI_D_BUS8, 0, 20, 0x22, 0x70,
254  BPI_BUS8, CONN_BPI_BUS8,
255  RES3, RES4, RES5, RES6, RES7),
256  PIN(72, BPI_D_BUS9, 0, 21, 0x22, 0x70,
257  BPI_BUS9, CONN_BPI_BUS9,
258  RES3, RES4, RES5, RES6, RES7),
259  PIN(73, BPI_D_BUS10, 0, 2, 0x22, 0x70,
260  BPI_BUS10, CONN_BPI_BUS10,
261  RES3, RES4, RES5, RES6, RES7),
262  PIN(74, BPI_D_BUS11_OLAT0, 0, 3, 0x22, 0x70,
263  BPI_BUS11_OLAT0, CONN_BPI_BUS11_OLAT0,
264  RES3, RES4, RES5, RES6, RES7),
265  PIN(75, BPI_D_BUS12_OLAT1, 0, 4, 0x22, 0x70,
266  BPI_BUS12_OLAT1, CONN_BPI_BUS12_OLAT1,
267  RES3, RES4, RES5, RES6, RES7),
268  PIN(76, BPI_D_BUS13_OLAT2, 0, 5, 0x22, 0x70,
269  BPI_BUS13_OLAT2, CONN_BPI_BUS13_OLAT2,
270  RES3, RES4, RES5, RES6, RES7),
271  PIN(77, BPI_D_BUS14_OLAT3, 0, 6, 0x22, 0x70,
272  BPI_BUS14_OLAT3, CONN_BPI_BUS14_OLAT3,
273  RES3, RES4, RES5, RES6, RES7),
274  PIN(78, BPI_D_BUS15_OLAT4, 0, 7, 0x22, 0x70,
275  BPI_BUS15_OLAT4, CONN_BPI_BUS15_OLAT4,
276  RES3, RES4, RES5, RES6, RES7),
277  PIN(79, BPI_D_BUS16_OLAT5, 0, 8, 0x22, 0x70,
278  BPI_BUS16_OLAT5, CONN_BPI_BUS16_OLAT5,
279  RES3, RES4, RES5, RES6, RES7),
280  PIN(80, BPI_D_BUS17_ANT0, 0, 9, 0x22, 0x70,
281  BPI_BUS17_ANT0, CONN_BPI_BUS17_ANT0,
282  PCIE_WAKE_N, RES4, RES5, RES6, RES7),
283  PIN(81, BPI_D_BUS18_ANT1, 0, 10, 0x22, 0x70,
284  BPI_BUS18_ANT1, CONN_BPI_BUS18_ANT1,
285  PCIE_PERESET_N, RES4, RES5, RES6, RES7),
286  PIN(82, BPI_D_BUS19_ANT2, 0, 11, 0x22, 0x70,
287  BPI_BUS19_ANT2, CONN_BPI_BUS19_ANT2,
288  PCIE_CLKREQ_N, RES4, RES5, RES6, RES7),
289  PIN(83, BPI_D_BUS20_ANT3, 0, 13, 0x22, 0x70,
290  BPI_BUS20_ANT3, CONN_BPI_BUS20_ANT3,
291  RES3, RES4, RES5, RES6, RES7),
292  PIN(84, BPI_D_BUS21_ANT4, 0, 14, 0x22, 0x70,
293  BPI_BUS21_ANT4, CONN_BPI_BUS21_ANT4,
294  RES3, RES4, RES5, RES6, RES7),
295  PIN(85, MIPI1_D_SCLK, 0, 31, 0x22, 0x70,
296  MIPI1_D_SCLK, CONN_MIPI1_SCLK,
297  RES3, RES4, RES5, RES6, RES7),
298  PIN(86, MIPI1_D_SDATA, 0, 0, 0x22, 0x80,
299  MIPI1_D_SDATA, CONN_MIPI1_SDATA,
300  RES3, RES4, RES5, RES6, RES7),
301  PIN(87, MIPI0_D_SCLK, 0, 29, 0x22, 0x70,
302  MIPI0_D_SCLK, CONN_MIPI0_SCLK,
303  RES3, RES4, RES5, RES6, RES7),
304  PIN(88, MIPI0_D_SDATA, 0, 30, 0x22, 0x70,
305  SMIPI0_D_SDATA, CONN_MIPI0_SDATA,
306  RES3, RES4, RES5, RES6, RES7),
307  PIN(89, SPMI_SCL, 0, 24, 0x21, 0x90,
308  SPMI_SCL, SCL10, RES3,
309  RES4, RES5, RES6, RES7),
310  PIN(90, SPMI_SDA, 0, 25, 0x21, 0x90,
311  SPMI_SDA, SDA10, RES3,
312  RES4, RES5, RES6, RES7),
313  PIN(91, AP_GOOD, 0, 0, 0x21, 0x90,
314  AP_GOOD, RES2, RES3, RES4,
315  RES5, RES6, RES7),
316  PIN(92, URXD0, 0, 2, 0x21, 0xa0,
317  URXD0, MD_URXD0, MD_URXD1,
318  SSPM_URXD_AO, CONN_UART0_RXD, RES6, RES7),
319  PIN(93, UTXD0, 0, 4, 0x21, 0xa0,
320  UTXD0, MD_UTXD0, MD_UTXD1, SSPM_UTXD_AO,
321  CONN_UART0_TXD, WIFI_TXD, RES7),
322  PIN(94, URXD1, 0, 3, 0x21, 0xa0,
323  URXD1, ADSP_URXD0, MD32_0_RXD,
324  SSPM_URXD_AO, TP_URXD1_AO, TP_URXD2_AO, MBISTREADEN_TRIGGER),
325  PIN(95, UTXD1, 0, 5, 0x21, 0xa0,
326  UTXD1, ADSP_UTXD0, MD32_0_TXD, SSPM_UTXD_AO,
327  TP_UTXD1_AO, TP_UTXD2_AO, MBISTWRITEEN_TRIGGER),
328  PIN(96, TDM_LRCK, 0, 31, 0x21, 0x90,
329  TDM_LRCK, I2S7_LRCK, I2S9_LRCK,
330  DPI_D0, ADSP_JTAG0_TDI, RES6, IO_JTAG_TDI),
331  PIN(97, TDM_BCK, 0, 26, 0x21, 0x90,
332  TDM_BCK, I2S7_BCK, I2S9_BCK, DPI_D1,
333  ADSP_JTAG0_TRSTN, RES6, IO_JTAG_TRSTN),
334  PIN(98, TDM_MCLK, 0, 0, 0x21, 0xa0,
335  TDM_MCK, I2S7_MCK, I2S9_MCK, DPI_D2,
336  ADSP_JTAG0_TCK, RES6, IO_JTAG_TCK),
337  PIN(99, TDM_DATA0, 0, 27, 0x21, 0x90,
338  TDM_DATA0, I2S6_DI, I2S8_DI, DPI_D3,
339  ADSP_JTAG0_TDO, RES6, IO_JTAG_TDO),
340  PIN(100, TDM_DATA1, 0, 28, 0x21, 0x90,
341  TDM_DATA1, I2S7_DO, I2S9_DO, DPI_D4,
342  ADSP_JTAG0_TMS, RES6, IO_JTAG_TMS),
343  PIN(101, TDM_DATA2, 0, 29, 0x21, 0x90,
344  TDM_DATA2, DMIC1_CLK, SRCLKENAI0, DPI_D5,
345  CLKM0, RES6, DAP_MD32_SWD),
346  PIN(102, TDM_DATA3, 0, 30, 0x21, 0x90,
347  TDM_DATA3, DMIC1_DAT, SRCLKENAI1,
348  DPI_D6, RES5, DVFSRC_EXT_REQ, DAP_MD32_SWCK),
349  PIN(103, SPI0_MI, 0, 18, 0x21, 0x90,
350  SPI0_A_MI, SCP_SPI0_MI, RES3, DPI_D7,
351  DFD_TDO, SPM_JTAG_TDO, JTDO_SEL1),
352  PIN(104, SPI0_CSB, 0, 17, 0x21, 0x90,
353  SPI0_A_CSB, SCP_SPI0_CS, RES3, DPI_D8, DFD_TMS,
354  SPM_JTAG_TMS, JTMS_SEL1),
355  PIN(105, SPI0_MO, 0, 19, 0x21, 0x90,
356  SPI0_A_MO, SCP_SPI0_MO, SCP_SDA0, DPI_D9,
357  DFD_TDI, SPM_JTAG_TDI, JTDI_SEL1),
358  PIN(106, SPI0_CLK, 0, 16, 0x21, 0x90,
359  SPI0_A_CLK, SCP_SPI0_CK, SCP_SCL0,
360  DPI_D10, DFD_TCK_XI, SPM_JTAG_TCK, JTCK_SEL1),
361  PIN(107, DMIC_CLK, 0, 1, 0x21, 0x90,
362  DMIC_CLK, PWM_0, CLKM2, RES4, RES5,
363  SPM_JTAG_TRSTN, JTRSTN_SEL1),
364  PIN(108, DMIC_DAT, 0, 2, 0x21, 0x90,
365  DMIC_DAT, PWM_1, CLKM3, RES4,
366  RES5, RES6, DAP_SONIC_SWD),
367  PIN(109, I2S1_MCK, 0, 10, 0x21, 0x90,
368  I2S1_MCK, I2S3_MCK, I2S2_MCK, DPI_DE,
369  I2S2_MCK_1, SRCLKENAI0, DAP_SONIC_SWCK),
370  PIN(110, I2S1_BCK, 0, 7, 0x21, 0x90,
371  I2S1_BCK, I2S3_BCK, I2S2_BCK, DPI_D11,
372  I2S2_BCK_1, CONN_MCU_TDO, RES7),
373  PIN(111, I2S1_LRCK, 0, 9, 0x21, 0x90,
374  I2S1_LRCK, I2S3_LRCK, I2S2_LRCK,
375  DPI_VSYNC, I2S2_LRCK_1, CONN_MCU_TDI, RES7),
376  PIN(112, I2S2_DI, 0, 11, 0x21, 0x90,
377  I2S2_DI, I2S0_DI, I2S2_DI2, DPI_CK,
378  I2S2_DI_1, CONN_MCU_TMS, RES7),
379  PIN(113, I2S1_DO, 0, 8, 0x21, 0x90,
380  I2S1_DO, I2S3_DO, I2S5_DO, DPI_HSYNC,
381  I2S2_DI2, CONN_MCU_TCK, RES7),
382  PIN(114, SCP_SPI2_MI, 0, 14, 0x21, 0x90,
383  SPI2_MI, SCP_SPI2_MI, RES3,
384  PCM0_DI, RES5, CONN_MCU_TRST_B, RES7),
385  PIN(115, SCP_SPI2_CSB, 0, 13, 0x21, 0x90,
386  SPI2_CSB, SCP_SPI2_CS, RES3, PCM0_SYNC,
387  RES5, CONN_MCU_DBGI_N, RES7),
388  PIN(116, SCP_SPI2_MO, 0, 15, 0x21, 0x90,
389  SPI2_MO, SCP_SPI2_MO, SCP_SDA1,
390  PCM0_DO, RES5, CONN_MCU_DBGACK_N, RES7),
391  PIN(117, SCP_SPI2_CK, 0, 12, 0x21, 0x90,
392  SPI2_CLK, SCP_SPI2_CK, SCP_SCL1,
393  PCM0_CLK, RES5, RES6, RES7),
394  PIN(118, SCL1, 0, 23, 0x23, 0xb0,
395  SCL1, SCP_SCL0, SCP_SCL1,
396  RES4, RES5, RES6, RES7),
397  PIN(119, SDA1, 0, 29, 0x23, 0xb0,
398  SDA1, SCP_SDA0, SCP_SDA1,
399  RES4, RES5, RES6, RES7),
400  PIN(120, SCL9, 0, 28, 0x23, 0xb0,
401  SCL9, SCP_SCL0, RES3,
402  RES4, RES5, RES6, RES7),
403  PIN(121, SDA9, 0, 2, 0x23, 0xc0,
404  SDA9, SCP_SDA0, RES3,
405  RES4, RES5, RES6, RES7),
406  PIN(122, SCL8, 0, 27, 0x23, 0xb0,
407  SCL8, SCP_SDA0, RES3,
408  RES4, RES5, RES6, RES7),
409  PIN(123, SDA8, 0, 1, 0x23, 0xc0,
410  SDA8, SCP_SCL0, RES3,
411  RES4, RES5, RES6, RES7),
412  PIN(124, SCL7, 0, 26, 0x23, 0xb0,
413  SCL7, DMIC1_CLK, RES3,
414  RES4, RES5, RES6, RES7),
415  PIN(125, SDA7, 0, 0, 0x23, 0xc0,
416  SDA7, DMIC1_DAT, RES3,
417  RES4, RES5, RES6, RES7),
418  PIN(126, PERIPHERAL_EN0, 0, 19, 0x23, 0xb0,
419  CMFLASH0, PWM_2, TP_UCTS1_AO,
420  UCTS0, SCL11, GPS_L1_ELNA_EN, DBG_MON_A14),
421  PIN(127, PERIPHERAL_EN1, 0, 20, 0x23, 0xb0,
422  CMFLASH1, PWM_3, TP_URTS1_AO, URTS0,
423  SDA11, RES6, DBG_MON_A15),
424  PIN(128, PERIPHERAL_EN2, 0, 21, 0x23, 0xb0,
425  CMFLASH2, PWM_0, TP_UCTS2_AO,
426  UCTS1, SCL_6306, RES6, DBG_MON_A16),
427  PIN(129, PERIPHERAL_EN3, 0, 22, 0x23, 0xb0,
428  CMFLASH3, PWM_1, TP_URTS2_AO, URTS1,
429  SDA_6306, RES6, DBG_MON_A17),
430  PIN(130, CAM_RST3, 0, 6, 0x23, 0xb0,
431  CMVREF0, ANT_SEL10, SCP_JTAG0_TDO,
432  MD32_0_JTAG_TDO, SCL11, SPI5_B_CLK, DBG_MON_A22),
433  PIN(131, CAM_RST4, 0, 7, 0x23, 0xb0,
434  CMVREF1, ANT_SEL11, SCP_JTAG0_TDI,
435  MD32_0_JTAG_TDI, SDA11, SPI5_B_MO, DBG_MON_A25),
436  PIN(132, CAM_RST5, 0, 8, 0x23, 0xb0,
437  CMVREF2, ANT_SEL12, SCP_JTAG0_TMS,
438  MD32_0_JTAG_TMS, RES5, RES6, DBG_MON_A28),
439  PIN(133, CAM_PDN3, 0, 3, 0x23, 0xb0,
440  CMVREF3, GPS_L1_ELNA_EN, SCP_JTAG0_TCK,
441  MD32_0_JTAG_TCK, CMMCLK5, SPI5_B_CSB, DBG_MON_A23),
442  PIN(134, CAM_PDN4, 0, 4, 0x23, 0xb0,
443  CMVREF4, RES2, SCP_JTAG0_TRSTN,
444  MD32_0_JTAG_TRST, RES5, RES6, DBG_MON_A26),
445  PIN(135, CAM_PDN5, 0, 5, 0x23, 0xb0,
446  PWM_0, SRCLKENAI1, MD_URXD0,
447  MD32_0_RXD, CONN_TCXOENA_REQ, RES6, DBG_MON_A29),
448  PIN(136, CAM_CLK3, 0, 0, 0x23, 0xb0,
449  CMMCLK3, CLKM1, MD_UTXD0, MD32_0_TXD,
450  RES5, SPI5_B_MI, DBG_MON_A24),
451  PIN(137, CAM_CLK4, 0, 1, 0x23, 0xb0,
452  CMMCLK4, CLKM2, MD_URXD1, RES4,
453  RES5, CONN_UART0_RXD, DBG_MON_A27),
454  PIN(138, CAM_CLK5, 0, 2, 0x23, 0xb0,
455  CMMCLK5, CLKM3, MD_UTXD1,
456  RES4, RES5, CONN_UART0_TXD, DBG_MON_A30),
457  PIN(139, SCL4, 0, 25, 0x23, 0xb0,
458  SCL4, RES2, RES3, RES4,
459  RES5, RES6, DBG_MON_A21),
460  PIN(140, SDA4, 0, 31, 0x23, 0xb0,
461  SDA4, RES2, RES3, RES4,
462  RES5, RES6, DBG_MON_A20),
463  PIN(141, SCL2, 0, 24, 0x23, 0xb0,
464  SCL2, RES2, RES3, RES4,
465  RES5, RES6, DBG_MON_A18),
466  PIN(142, SDA2, 0, 30, 0x23, 0xb0,
467  SDA2, RES2, RES3, RES4,
468  RES5, RES6, DBG_MON_A19),
469  PIN(143, CAM_RST0, 0, 6, 0x20, 0x70,
470  CMVREF0, SPI3_CLK, ADSP_JTAG1_TDO,
471  SCP_JTAG1_TDO, RES5, RES6, DBG_MON_A31),
472  PIN(144, CAM_RST1, 0, 7, 0x20, 0x70,
473  CMVREF1, SPI3_CSB, ADSP_JTAG1_TDI,
474  SCP_JTAG1_TDI, RES5, RES6, RES7),
475  PIN(145, CAM_RST2, 0, 8, 0x20, 0x70,
476  CMVREF2, SPI3_MI, ADSP_JTAG1_TMS,
477  SCP_JTAG1_TMS, RES5, RES6, RES7),
478  PIN(146, CAM_PDN0, 0, 3, 0x20, 0x70,
479  CMVREF3, SPI3_MO, ADSP_JTAG1_TCK,
480  SCP_JTAG1_TCK, RES5, RES6, DBG_MON_A32),
481  PIN(147, CAM_PDN1, 0, 4, 0x20, 0x70,
482  CMVREF4, EXT_FRAME_SYNC, ADSP_JTAG1_TRSTN,
483  SCP_JTAG1_TRSTN, RES5, RES6, RES7),
484  PIN(148, CAM_PDN2, 0, 5, 0x20, 0x70,
485  PWM_1, AGPS_SYNC, RES3, RES4,
486  RES5, RES6, RES7),
487  PIN(149, CAM_CLK0, 0, 0, 0x20, 0x70,
488  CMMCLK0, CLKM0, MD32_0_GPIO0,
489  RES4, RES5, RES6, RES7),
490  PIN(150, CAM_CLK1, 0, 1, 0x20, 0x70,
491  CMMCLK1, CLKM1, MD32_0_GPIO1,
492  RES4, RES5, RES6, CONN_MCU_AICE_TMSC),
493  PIN(151, CAM_CLK2, 0, 2, 0x20, 0x70,
494  CMMCLK2, CLKM2, MD32_0_GPIO2,
495  RES4, RES5, RES6, CONN_MCU_AICE_TCKC),
496  PIN(152, KPROW1, 1, 3, 0x36, 0x90,
497  KPROW1, PWM_2, IDDIG, RES4, RES5,
498  MBISTREADEN_TRIGGER, DBG_MON_B9),
499  PIN(153, KPROW0, 1, 2, 0x36, 0x90,
500  KPROW0, RES2, RES3, RES4,
501  RES5, RES6, DBG_MON_B8),
502  PIN(154, KPCOL0, 1, 0, 0x36, 0x90,
503  KPCOL0, RES2, RES3, RES4,
504  RES5, RES6, DBG_MON_B6),
505  PIN(155, KPCOL1, 1, 1, 0x36, 0x90,
506  KPCOL1, PWM_3, USB_DRVVBUS, CONN_TCXOENA_REQ,
507  RES5, MBISTWRITEEN_TRIGGER, DBG_MON_B7),
508  PIN(156, SPI1_CLK, 0, 29, 0x36, 0xa0,
509  SPI1_A_CLK, SCP_SPI1_A_CK, MRG_CLK,
510  AGPS_SYNC, MD_URXD0, UDI_TMS, DBG_MON_B10),
511  PIN(157, SPI1_CSB, 0, 30, 0x36, 0xa0,
512  SPI1_A_CSB, SCP_SPI1_A_CS, MRG_SYNC,
513  EXT_FRAME_SYNC, MD_UTXD0, UDI_TCK, DBG_MON_B11),
514  PIN(158, SPI1_MI, 0, 31, 0x36, 0xa0,
515  SPI1_A_MI, SCP_SPI1_A_MI, MRG_DI,
516  PTA_RXD, MD_URXD1, UDI_TDO, DBG_MON_B12),
517  PIN(159, SPI1_MO, 0, 0, 0x36, 0xb0,
518  SPI1_A_MO, SCP_SPI1_A_MO, MRG_DO, PTA_TXD,
519  MD_UTXD1, UDI_NTRST, DBG_MON_B13),
520  PIN(160, SCL3, 0, 27, 0x36, 0xa0,
521  SCL3, RES2, SCP_SCL1, RES4,
522  RES5, RES6, DBG_MON_B14),
523  PIN(161, SDA3, 0, 28, 0x36, 0xa0,
524  SDA3, RES2, SCP_SDA1, RES4,
525  RES5, RES6, DBG_MON_B15),
526  PIN(162, ANT_SEL0, 0, 0, 0x36, 0xa0,
527  ANT_SEL0, GPS_L1_ELNA_EN, RES3,
528  RES4, RES5, UDI_TDI, DBG_MON_B16),
529  PIN(163, ANT_SEL1, 0, 1, 0x36, 0xa0,
530  ANT_SEL1, CONN_TCXOENA_REQ, RES3,
531  RES4, RES5, RES6, DBG_MON_B17),
532  PIN(164, ANT_SEL2, 0, 2, 0x36, 0xa0,
533  ANT_SEL2, SCP_SPI1_B_CK, TP_URXD1_AO,
534  RES4, UCTS0, RES6, DBG_MON_B18),
535  PIN(165, ANT_SEL3, 0, 3, 0x36, 0xa0,
536  ANT_SEL3, SCP_SPI1_B_CS, TP_UTXD1_AO,
537  CONN_TCXOENA_REQ, URTS0, RES6, DBG_MON_B19),
538  PIN(166, ANT_SEL4, 0, 4, 0x36, 0xa0,
539  ANT_SEL4, SCP_SPI1_B_MI, TP_URXD2_AO,
540  SRCLKENAI1, UCTS1, RES6, DBG_MON_B207),
541  PIN(167, ANT_SEL5, 0, 5, 0x36, 0xa0,
542  ANT_SEL5, SCP_SPI1_B_MO, TP_UTXD2_AO,
543  SRCLKENAI0, URTS1, RES6, DBG_MON_B21),
544  PIN(168, ANT_SEL6, 0, 6, 0x36, 0xa0,
545  ANT_SEL6, SPI0_B_CLK, TP_UCTS1_AO,
546  KPCOL2, MD_UCTS0, SCL11, DBG_MON_B22),
547  PIN(169, ANT_SEL7, 0, 7, 0x36, 0xa0,
548  ANT_SEL7, SPI0_B_CSB, TP_URTS1_AO, KPROW2,
549  MD_URTS0, SDA11, DBG_MON_B23),
550  PIN(170, ANT_SEL8, 0, 8, 0x36, 0xa0,
551  ANT_SEL8, SPI0_B_MI, TP_UCTS2_AO,
552  SRCLKENAI1, MD_UCTS1, RES6, DBG_MON_B24),
553  PIN(171, ANT_SEL9, 0, 9, 0x36, 0xa0,
554  ANT_SEL9, SPI0_B_MO, TP_URTS2_AO,
555  SRCLKENAI0, MD_URTS1, RES6, DBG_MON_B25),
556  PIN(172, CONN_TOP_CLK, 0, 13, 0x36, 0xa0,
557  CONN_TOP_CLK, AUXIF_CLK0, RES3,
558  RES4, RES5, RES6, DBG_MON_B29),
559  PIN(173, CONN_TOP_DATA, 0, 14, 0x36, 0xa0,
560  CONN_TOP_DATA, AUXIF_ST0, RES3,
561  RES4, RES5, RES6, DBG_MON_B30),
562  PIN(174, CONN_HRST_B, 0, 12, 0x36, 0xa0,
563  CONN_HRST_B, RES2, RES3, RES4,
564  RES5, RES6, DBG_MON_B28),
565  PIN(175, CONN_WB_PTA, 0, 15, 0x36, 0xa0,
566  CONN_WB_PTA, RES2, RES3, RES4,
567  RES5, RES6, DBG_MON_B31),
568  PIN(176, CONN_BT_CLK, 0, 10, 0x36, 0xa0,
569  CONN_BT_CLK, AUXIF_CLK1, RES3, RES4,
570  RES5, RES6, DBG_MON_B26),
571  PIN(177, CONN_BT_DATA, 0, 11, 0x36, 0xa0,
572  CONN_BT_DATA, AUXIF_ST1, RES3,
573  RES4, RES5, RES6, DBG_MON_B27),
574  PIN(178, CONN_WF_CTRL0, 0, 16, 0x36, 0xa0,
575  CONN_WF_CTRL0, RES2, RES3,
576  RES4, RES5, RES6, RES7),
577  PIN(179, CONN_WF_CTRL1, 0, 17, 0x36, 0xa0,
578  CONN_WF_CTRL1, UFS_MPHY_SCL,
579  RES3, RES4, RES5, RES6, RES7),
580  PIN(180, CONN_WF_CTRL2, 0, 18, 0x36, 0xa0,
581  CONN_WF_CTRL2, UFS_MPHY_SDA,
582  RES3, RES4, RES5, RES6, RES7),
583  PIN(181, CONN_WF_CTRL3, 0, 19, 0x36, 0xa0,
584  CONN_WF_CTRL3, RES2, RES3,
585  RES4, RES5, RES6, RES7),
586  PIN(182, CONN_WF_CTRL4, 0, 20, 0x36, 0xa0,
587  CONN_WF_CTRL4, RES2, RES3,
588  RES4, RES5, RES6, RES7),
589  PIN(183, MSDC0_CMD, 1, 1, 0x18, 0x30,
590  MSDC0_CMD, RES2, RES3,
591  RES4, RES5, RES6, RES7),
592  PIN(184, MSDC0_DAT0, 1, 2, 0x18, 0x30,
593  MSDC0_DAT0, RES2, RES3,
594  RES4, RES5, RES6, RES7),
595  PIN(185, MSDC0_DAT2, 1, 4, 0x18, 0x30,
596  MSDC0_DAT2, RES2, RES3,
597  RES4, RES5, RES6, RES7),
598  PIN(186, MSDC0_DAT4, 1, 6, 0x18, 0x30,
599  MSDC0_DAT4, RES2, RES3,
600  RES4, RES5, RES6, RES7),
601  PIN(187, MSDC0_DAT6, 1, 8, 0x18, 0x30,
602  MSDC0_DAT6, RES2, RES3,
603  RES4, RES5, RES6, RES7),
604  PIN(188, MSDC0_DAT1, 1, 3, 0x18, 0x30,
605  MSDC0_DAT1, RES2, RES3,
606  RES4, RES5, RES6, RES7),
607  PIN(189, MSDC0_DAT5, 1, 7, 0x18, 0x30,
608  MSDC0_DAT5, RES2, RES3,
609  RES4, RES5, RES6, RES7),
610  PIN(190, MSDC0_DAT7, 1, 9, 0x18, 0x30,
611  MSDC0_DAT7, RES2, RES3,
612  RES4, RES5, RES6, RES7),
613  PIN(191, MSDC0_DSL, 1, 10, 0x18, 0x30,
614  MSDC0_DSL, GPS_L1_ELNA_EN,
615  IDDIG, DMIC_CLK, RES5, RES6, RES7),
616  PIN(192, MSDC0_CLK, 1, 0, 0x18, 0x30,
617  MSDC0_CLK, RES2, USB_DRVVBUS,
618  DMIC_DAT, RES5, RES6, RES7),
619  PIN(193, MSDC0_DAT3, 1, 5, 0x18, 0x30,
620  MSDC0_DAT3, RES2, RES3,
621  RES4, RES5, RES6, RES7),
622  PIN(194, MSDC0_RSTB, 1, 11, 0x18, 0x30,
623  MSDC0_RSTB, RES2, RES3,
624  RES4, RES5, RES6, RES7),
625  PIN(195, SCP_VREQ_VAO, 0, 16, 0x14, 0x50,
626  SCP_VREQ_VAO, DVFSRC_EXT_REQ,
627  RES3, RES4, RES5, RES6, RES7),
628  PIN(196, AUD_DAT_MOSI2, 0, 6, 0x14, 0x50,
629  AUD_DAT_MOSI2, RES2, RES3,
630  RES4, RES5, RES6, RES7),
631  PIN(197, AUD_NLE_MOSI1, 0, 8, 0x14, 0x50,
632  AUD_NLE_MOSI1, AUD_CLK_MISO,
633  I2S2_MCK, I2S6_MCK, I2S8_MCK, RES6, RES7),
634  PIN(198, AUD_NLE_MOSI0, 0, 7, 0x14, 0x50,
635  AUD_NLE_MOSI0, AUD_SYNC_MISO,
636  I2S2_BCK, I2S6_BCK, I2S8_BCK, RES6, RES7),
637  PIN(199, AUD_DAT_MISO2, 0, 3, 0x14, 0x50,
638  AUD_DAT_MISO2, RES2, I2S2_DI2,
639  RES4, RES5, RES6, RES7),
640  PIN(200, SCL6, 0, 6, 0x17, 0x50,
641  SCL6, RES2, SCP_SCL1, SCL_6306,
642  RES5, RES6, DBG_MON_A4),
643  PIN(201, SDA6, 0, 8, 0x17, 0x50,
644  SDA6, RES2, SCP_SDA1, SDA_6306,
645  RES5, RES6, DBG_MON_A5),
646  PIN(202, SCL5, 0, 15, 0x14, 0x50,
647  SCL5, RES2, RES3,
648  RES4, RES5, RES6, RES7),
649  PIN(203, SDA5, 0, 17, 0x14, 0x50,
650  SDA5, RES2, RES3,
651  RES4, RES5, RES6, RES7),
652  PIN(204, SCL0, 0, 5, 0x17, 0x50,
653  SCL0, RES2, RES3, RES4,
654  RES5, SPI7_A_CLK, DBG_MON_A2),
655  PIN(205, SDA0, 0, 7, 0x17, 0x50,
656  SDA0, RES2, RES3, RES4,
657  RES5, SPI7_A_CSB, DBG_MON_A3),
658  PIN(206, SRCLKENA0, 0, 18, 0x14, 0x50,
659  SRCLKENA0, RES2, RES3, RES4,
660  RES5, RES6, RES7),
661  PIN(207, SRCLKENA1, 0, 19, 0x14, 0x50,
662  SRCLKENA1, RES2, RES3,
663  RES4, RES5, RES6, RES7),
664  PIN(208, WATCHDOG, 0, 20, 0x14, 0x50,
665  WATCHDOG, RES2, RES3, RES4,
666  RES5, RES6, RES7),
667  PIN(209, PWRAP_SPI0_MI, 0, 12, 0x14, 0x50,
668  PWRAP_SPI0_MI, PWRAP_SPI0_MO,
669  RES3, RES4, RES5, RES6, RES7),
670  PIN(210, PWRAP_SPI0_CSN, 0, 11, 0x14, 0x50,
671  PWRAP_SPI0_CSN, RES2, RES3,
672  RES4, RES5, RES6, RES7),
673  PIN(211, PWRAP_SPI0_MO, 0, 13, 0x14, 0x50,
674  PWRAP_SPI0_MO, PWRAP_SPI0_MI,
675  RES3, RES4, RES5, RES6, RES7),
676  PIN(212, PWRAP_SPI0_CK, 0, 10, 0x14, 0x50,
677  PWRAP_SPI0_CK, RES2, RES3,
678  RES4, RES5, RES6, RES7),
679  PIN(213, RTC32K_CK, 0, 14, 0x14, 0x50,
680  RTC32K_CK, RES2, RES3,
681  RES4, RES5, RES6, RES7),
682  PIN(214, AUD_CLK_MOSI, 0, 0, 0x14, 0x50,
683  AUD_CLK_MOSI, RES2, I2S1_MCK,
684  I2S7_MCK, I2S9_MCK, RES6, RES7),
685  PIN(215, AUD_SYNC_MOSI, 0, 9, 0x14, 0x50,
686  AUD_SYNC_MOSI, RES2, I2S1_BCK,
687  I2S7_BCK, I2S9_BCK, RES6, RES7),
688  PIN(216, AUD_DAT_MOSI0, 0, 4, 0x14, 0x50,
689  AUD_DAT_MOSI0, RES2, I2S1_LRCK,
690  I2S7_LRCK, I2S9_LRCK, RES6, RES7),
691  PIN(217, AUD_DAT_MOSI1, 0, 5, 0x14, 0x50,
692  AUD_DAT_MOSI1, RES2, I2S1_DO,
693  I2S7_DO, I2S9_DO, RES6, RES7),
694  PIN(218, AUD_DAT_MISO0, 0, 1, 0x14, 0x50,
695  AUD_DAT_MISO0, VOW_DAT_MISO, I2S2_LRCK,
696  I2S6_LRCK, I2S8_LRCK, RES6, RES7),
697  PIN(219, AUD_DAT_MISO1, 0, 2, 0x14, 0x50,
698  AUD_DAT_MISO1, VOW_CLK_MISO, I2S2_DI,
699  I2S6_DI, I2S8_DI, RES6, RES7),
700 };
701 
702 struct val_regs {
703  uint32_t val;
704  uint32_t set;
705  uint32_t rst;
706  uint32_t align;
707 };
708 
709 struct gpio_regs {
710  struct val_regs dir[7];
711  uint8_t rsv00[144];
712  struct val_regs dout[7];
713  uint8_t rsv01[144];
714  struct val_regs din[7];
715  uint8_t rsv02[144];
716  struct val_regs mode[28];
717  uint8_t rsv03[560];
718  uint32_t dram_pinmux_trapping;
719 };
720 
721 check_member(gpio_regs, mode[27].val, 0x4b0);
722 check_member(gpio_regs, dram_pinmux_trapping, 0x6f0);
723 
724 static struct gpio_regs *const mtk_gpio = (void *)(GPIO_BASE);
725 
726 #endif
SPI0_CLK
#define SPI0_CLK
Definition: gpio_soc_defs.h:104
GPIO_BASE
#define GPIO_BASE
Definition: lpc.h:21
check_member
check_member(gpio_regs, msdc2_ctrl5, 0xcb0)
MAX_GPIO_MODE_PER_REG
@ MAX_GPIO_MODE_PER_REG
Definition: gpio.h:11
GPIO_MODE_BITS
@ GPIO_MODE_BITS
Definition: gpio.h:12
MAX_GPIO_REG_BITS
@ MAX_GPIO_REG_BITS
Definition: gpio.h:10
mtk_gpio
static struct gpio_regs *const mtk_gpio
Definition: gpio.h:724
PIN
#define PIN(id, name, flag, bit, base, offset, func1, func2, func3, func4, func5, func6, func7)
Definition: gpio.h:16
uint32_t
unsigned int uint32_t
Definition: stdint.h:14
uint8_t
unsigned char uint8_t
Definition: stdint.h:8
gpio_regs
Definition: gpio.h:312
gpio_regs::din
struct val_regs din[9]
Definition: gpio.h:322
gpio_regs::rsv00
uint8_t rsv00[112]
Definition: gpio.h:314
gpio_regs::mode
struct val_regs mode[27]
Definition: gpio.h:324
gpio_regs::rsv03
uint8_t rsv03[256]
Definition: gpio.h:319
gpio_regs::rsv02
uint8_t rsv02[112]
Definition: gpio.h:318
gpio_regs::dout
struct val_regs dout[9]
Definition: gpio.h:320
gpio_regs::rsv01
uint8_t rsv01[112]
Definition: gpio.h:316
gpio_regs::dram_pinmux_trapping
uint32_t dram_pinmux_trapping
Definition: gpio.h:631
gpio_regs::dir
struct val_regs dir[9]
Definition: gpio.h:313
val_regs
Definition: gpio.h:305
val_regs::align
uint32_t align
Definition: gpio.h:309
val_regs::set
uint32_t set
Definition: gpio.h:307
val_regs::val
uint32_t val
Definition: gpio.h:306
val_regs::rst
uint32_t rst
Definition: gpio.h:308
val
u8 val
Definition: sys.c:300