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Macros
#define	_PCH_DEVFN(slot, func) PCI_DEVFN(PCH_DEV_SLOT_ ## slot, func)

#define	_PCH_DEV(slot, func) pcidev_path_on_root_debug(_PCH_DEVFN(slot, func), __func__)

#define	PCH_DEV_SLOT_MROM0 0x11

#define	PCH_DEVFN_SSATA _PCH_DEVFN(MROM0, 5)

#define	PCH_DEV_SSATA _PCH_DEV(MROM0, 5)

#define	XHCI_BUS_NUMBER 0x0

#define	PCH_DEV_SLOT_XHCI 0x14

#define	XHCI_FUNC_NUM 0x0

#define	PCH_DEVFN_XHCI _PCH_DEVFN(XHCI, 0)

#define	PCH_DEV_XHCI _PCH_DEV(XHCI, 0)

#define	PCH_DEVFN_THERMAL _PCH_DEVFN(XHCI, 2)

#define	HPET_BUS_NUM 0x0

#define	HPET_DEV_NUM PCH_DEV_SLOT_LPC

#define	HPET0_FUNC_NUM 0x00

#define	PCH_DEV_SLOT_CSE 0x16

#define	PCH_DEVFN_CSE _PCH_DEVFN(CSE, 0)

#define	PCH_DEVFN_CSE_2 _PCH_DEVFN(CSE, 1)

#define	PCH_DEVFN_CSE_3 _PCH_DEVFN(CSE, 4)

#define	PCH_DEV_CSE _PCH_DEV(CSE, 0)

#define	PCH_DEV_CSE_2 _PCH_DEV(CSE, 1)

#define	PCH_DEV_CSE_3 _PCH_DEV(CSE, 4)

#define	PCH_DEV_SLOT_SATA 0x17

#define	PCH_DEVFN_SATA _PCH_DEVFN(SATA, 0)

#define	PCH_DEV_SATA _PCH_DEV(SATA, 0)

#define	SATAGC 0x9c

#define	SATAGC_REGLOCK BIT(31)

#define	PCH_DEV_SLOT_LPC 0x1f

#define	PCH_DEVFN_LPC _PCH_DEVFN(LPC, 0)

#define	PCH_DEVFN_P2SB _PCH_DEVFN(LPC, 1)

#define	PCH_DEVFN_PMC _PCH_DEVFN(LPC, 2)

#define	PCH_DEVFN_SMBUS _PCH_DEVFN(LPC, 4)

#define	PCH_DEVFN_SPI _PCH_DEVFN(LPC, 5)

#define	PCH_DEV_LPC _PCH_DEV(LPC, 0)

#define	PCH_DEV_P2SB _PCH_DEV(LPC, 1)

#define	PCH_DEV_PMC _PCH_DEV(LPC, 2)

#define	PCH_DEV_SMBUS _PCH_DEV(LPC, 4)

#define	PCH_DEV_SPI _PCH_DEV(LPC, 5)

#define	PCH_IOAPIC_BUS_NUMBER 0xF0

#define	PCH_IOAPIC_DEV_NUM 0x1F

#define	PCH_IOAPIC_FUNC_NUM 0x00

#define	PCH_IOAPIC_ID 0x08

Macro Definition Documentation

◆ _PCH_DEV

#define _PCH_DEV	(	slot,
		func
	)	pcidev_path_on_root_debug(_PCH_DEVFN(slot, func), __func__)

Definition at line 9 of file pch_pci_devs.h.

◆ _PCH_DEVFN

#define _PCH_DEVFN	(	slot,
		func
	)	PCI_DEVFN(PCH_DEV_SLOT_ ## slot, func)

Definition at line 6 of file pch_pci_devs.h.

◆ HPET0_FUNC_NUM

#define HPET0_FUNC_NUM 0x00

Definition at line 29 of file pch_pci_devs.h.

◆ HPET_BUS_NUM

#define HPET_BUS_NUM 0x0

Definition at line 27 of file pch_pci_devs.h.

◆ HPET_DEV_NUM

#define HPET_DEV_NUM PCH_DEV_SLOT_LPC

Definition at line 28 of file pch_pci_devs.h.

◆ PCH_DEV_CSE

#define PCH_DEV_CSE _PCH_DEV(CSE, 0)

Definition at line 35 of file pch_pci_devs.h.

◆ PCH_DEV_CSE_2

#define PCH_DEV_CSE_2 _PCH_DEV(CSE, 1)

Definition at line 36 of file pch_pci_devs.h.

◆ PCH_DEV_CSE_3

#define PCH_DEV_CSE_3 _PCH_DEV(CSE, 4)

Definition at line 37 of file pch_pci_devs.h.

◆ PCH_DEV_LPC

#define PCH_DEV_LPC _PCH_DEV(LPC, 0)

Definition at line 51 of file pch_pci_devs.h.

◆ PCH_DEV_P2SB

#define PCH_DEV_P2SB _PCH_DEV(LPC, 1)

Definition at line 52 of file pch_pci_devs.h.

◆ PCH_DEV_PMC

#define PCH_DEV_PMC _PCH_DEV(LPC, 2)

Definition at line 53 of file pch_pci_devs.h.

◆ PCH_DEV_SATA

#define PCH_DEV_SATA _PCH_DEV(SATA, 0)

Definition at line 41 of file pch_pci_devs.h.

◆ PCH_DEV_SLOT_CSE

#define PCH_DEV_SLOT_CSE 0x16

Definition at line 31 of file pch_pci_devs.h.

◆ PCH_DEV_SLOT_LPC

#define PCH_DEV_SLOT_LPC 0x1f

Definition at line 45 of file pch_pci_devs.h.

◆ PCH_DEV_SLOT_MROM0

#define PCH_DEV_SLOT_MROM0 0x11

Definition at line 16 of file pch_pci_devs.h.

◆ PCH_DEV_SLOT_SATA

#define PCH_DEV_SLOT_SATA 0x17

Definition at line 39 of file pch_pci_devs.h.

◆ PCH_DEV_SLOT_XHCI

#define PCH_DEV_SLOT_XHCI 0x14

Definition at line 21 of file pch_pci_devs.h.

◆ PCH_DEV_SMBUS

#define PCH_DEV_SMBUS _PCH_DEV(LPC, 4)

Definition at line 54 of file pch_pci_devs.h.

◆ PCH_DEV_SPI

#define PCH_DEV_SPI _PCH_DEV(LPC, 5)

Definition at line 55 of file pch_pci_devs.h.

◆ PCH_DEV_SSATA

#define PCH_DEV_SSATA _PCH_DEV(MROM0, 5)

Definition at line 18 of file pch_pci_devs.h.

◆ PCH_DEV_XHCI

#define PCH_DEV_XHCI _PCH_DEV(XHCI, 0)

Definition at line 24 of file pch_pci_devs.h.

◆ PCH_DEVFN_CSE

#define PCH_DEVFN_CSE _PCH_DEVFN(CSE, 0)

Definition at line 32 of file pch_pci_devs.h.

◆ PCH_DEVFN_CSE_2

#define PCH_DEVFN_CSE_2 _PCH_DEVFN(CSE, 1)

Definition at line 33 of file pch_pci_devs.h.

◆ PCH_DEVFN_CSE_3

#define PCH_DEVFN_CSE_3 _PCH_DEVFN(CSE, 4)

Definition at line 34 of file pch_pci_devs.h.

◆ PCH_DEVFN_LPC

#define PCH_DEVFN_LPC _PCH_DEVFN(LPC, 0)

Definition at line 46 of file pch_pci_devs.h.

◆ PCH_DEVFN_P2SB

#define PCH_DEVFN_P2SB _PCH_DEVFN(LPC, 1)

Definition at line 47 of file pch_pci_devs.h.

◆ PCH_DEVFN_PMC

#define PCH_DEVFN_PMC _PCH_DEVFN(LPC, 2)

Definition at line 48 of file pch_pci_devs.h.

◆ PCH_DEVFN_SATA

#define PCH_DEVFN_SATA _PCH_DEVFN(SATA, 0)

Definition at line 40 of file pch_pci_devs.h.

◆ PCH_DEVFN_SMBUS

#define PCH_DEVFN_SMBUS _PCH_DEVFN(LPC, 4)

Definition at line 49 of file pch_pci_devs.h.

◆ PCH_DEVFN_SPI

#define PCH_DEVFN_SPI _PCH_DEVFN(LPC, 5)

Definition at line 50 of file pch_pci_devs.h.

◆ PCH_DEVFN_SSATA

#define PCH_DEVFN_SSATA _PCH_DEVFN(MROM0, 5)

Definition at line 17 of file pch_pci_devs.h.

◆ PCH_DEVFN_THERMAL

#define PCH_DEVFN_THERMAL _PCH_DEVFN(XHCI, 2)

Definition at line 25 of file pch_pci_devs.h.

◆ PCH_DEVFN_XHCI

#define PCH_DEVFN_XHCI _PCH_DEVFN(XHCI, 0)

Definition at line 23 of file pch_pci_devs.h.

◆ PCH_IOAPIC_BUS_NUMBER

#define PCH_IOAPIC_BUS_NUMBER 0xF0

Definition at line 57 of file pch_pci_devs.h.

◆ PCH_IOAPIC_DEV_NUM

#define PCH_IOAPIC_DEV_NUM 0x1F

Definition at line 58 of file pch_pci_devs.h.

◆ PCH_IOAPIC_FUNC_NUM

#define PCH_IOAPIC_FUNC_NUM 0x00

Definition at line 59 of file pch_pci_devs.h.

◆ PCH_IOAPIC_ID

#define PCH_IOAPIC_ID 0x08

Definition at line 62 of file pch_pci_devs.h.

◆ SATAGC

#define SATAGC 0x9c

Definition at line 42 of file pch_pci_devs.h.

◆ SATAGC_REGLOCK

#define SATAGC_REGLOCK BIT(31)

Definition at line 43 of file pch_pci_devs.h.

◆ XHCI_BUS_NUMBER

#define XHCI_BUS_NUMBER 0x0

Definition at line 20 of file pch_pci_devs.h.

◆ XHCI_FUNC_NUM

#define XHCI_FUNC_NUM 0x0

Definition at line 22 of file pch_pci_devs.h.

Macros