coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
bootblock.c File Reference
#include <arch/bootblock.h>
#include <device/pci_ops.h>
#include <southbridge/intel/common/early_spi.h>
#include "pch.h"
#include "chip.h"
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Functions

static void enable_port80_on_lpc (void)
 
static void set_spi_speed (void)
 
static void early_lpc_init (void)
 
void bootblock_early_southbridge_init (void)
 

Function Documentation

◆ bootblock_early_southbridge_init()

void bootblock_early_southbridge_init ( void  )

Definition at line 77 of file bootblock.c.

References early_lpc_init(), enable_port80_on_lpc(), enable_spi_prefetching_and_caching(), PCI_DEV, pci_write_config32(), RC, RCBA, RCBA32, and set_spi_speed().

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◆ early_lpc_init()

◆ enable_port80_on_lpc()

static void enable_port80_on_lpc ( void  )
static

Definition at line 9 of file bootblock.c.

References GCS, and RCBA32.

Referenced by bootblock_early_southbridge_init().

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◆ set_spi_speed()

static void set_spi_speed ( void  )
static

Definition at line 14 of file bootblock.c.

References RCBA32, and RCBA8.

Referenced by bootblock_early_southbridge_init().

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