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coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <arch/bootblock.h>
#include <device/pci_ops.h>
#include <southbridge/intel/common/early_spi.h>
#include "pch.h"
Go to the source code of this file.
Functions | |
static void | map_rcba (void) |
static void | enable_port80_on_lpc (void) |
static void | set_spi_speed (void) |
void | bootblock_early_southbridge_init (void) |
Definition at line 42 of file bootblock.c.
References CONFIG, enable_port80_on_lpc(), enable_spi_prefetching_and_caching(), mainboard_config_superio(), map_rcba(), pch_enable_lpc(), RC, RCBA32, set_spi_speed(), and uart_bootblock_init().
Definition at line 13 of file bootblock.c.
Referenced by bootblock_early_southbridge_init().
Definition at line 8 of file bootblock.c.
References PCH_LPC_DEV, pci_write_config32(), and RCBA.
Referenced by bootblock_early_southbridge_init().
Definition at line 22 of file bootblock.c.
References FDOC, FDOD, SPIBAR32, SPIBAR8, and SSFC.
Referenced by bootblock_early_southbridge_init().