coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
me.c File Reference
#include <device/pci_ops.h>
#include <bootstate.h>
#include <commonlib/helpers.h>
#include <console/console.h>
#include <device/pci.h>
#include <intelblocks/cse.h>
#include <soc/iomap.h>
#include <soc/me.h>
#include <soc/pci_devs.h>
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Go to the source code of this file.

Functions

void intel_me_status (void)
 
int send_global_reset (void)
 
 BOOT_STATE_INIT_ENTRY (BS_DEV_ENABLE, BS_ON_EXIT, print_me_fw_version, NULL)
 

Variables

static const char *const me_cws_values []
 
static const char *const me_opstate_values []
 
static const char *const me_opmode_values []
 
static const char *const me_error_values []
 
static const char *const me_progress_values []
 
static const char *const me_pmevent_values []
 
static const char *const me_progress_rom_values []
 
static const char *const me_progress_bup_values []
 

Function Documentation

◆ BOOT_STATE_INIT_ENTRY()

BOOT_STATE_INIT_ENTRY ( BS_DEV_ENABLE  ,
BS_ON_EXIT  ,
print_me_fw_version  ,
NULL   
)

◆ intel_me_status()

void intel_me_status ( void  )

Definition at line 184 of file me.c.

References ARRAY_SIZE, ARRAY_TO_ELEMENT, BIOS_DEBUG, BIOS_INFO, me_hfsts1::boot_options_present, me_hfs::boot_options_present, me_hfsts2::cpu_replaced_sts, me_hfsts2::cpu_replaced_valid, me_hfsts2::current_pmevent, me_hfs2::current_pmevent, me_hfs2::current_state, me_hfsts2::current_state, me_hfsts1::d0i3_support_valid, me_hfsts1::d3_support_valid, me_hfsts1::data, me_hfsts3::data, me_hfsts2::data, me_hfsts6::data, me_hfsts3::encrypt_key_check, me_hfsts3::encrypt_key_override, me_hfsts1::error_code, me_hfs::error_code, me_hfsts1::fields, me_hfsts3::fields, me_hfsts2::fields, me_hfsts6::fields, me_hfsts6::fpf_nvars, me_hfsts1::fpt_bad, me_hfs::fpt_bad, me_hfsts1::ft_bup_ld_flr, me_hfs::ft_bup_ld_flr, me_hfsts1::fw_init_complete, me_hfs::fw_init_complete, me_hfsts3::fw_sku, is_cse_enabled(), me_hfsts2::low_power_state, me_cws_values, me_error_values, ME_HFS2_PHASE_BUP, ME_HFS2_PHASE_HOST_COMM, ME_HFS2_PHASE_POLICY, ME_HFS2_PHASE_ROM, ME_HFS2_PHASE_UKERNEL, ME_HFS3_FW_SKU_CONSUMER, ME_HFS3_FW_SKU_CORPORATE, ME_HFS6_FPF_ERROR, ME_HFS6_FPF_NOT_COMMITTED, me_opmode_values, me_opstate_values, me_pmevent_values, me_progress_bup_values, me_progress_policy_values, me_progress_rom_values, me_progress_values, me_read_config32(), me_read_dword_ptr(), me_hfsts1::mfg_mode, me_hfs::mfg_mode, NULL, me_hfsts1::operation_mode, me_hfs::operation_mode, me_hfsts1::operation_state, me_hfs::operation_state, me_hfsts3::pch_config_change, PCI_ME_HFS, PCI_ME_HFS2, PCI_ME_HFSTS1, PCI_ME_HFSTS2, PCI_ME_HFSTS3, PCI_ME_HFSTS4, PCI_ME_HFSTS5, PCI_ME_HFSTS6, me_hfsts3::power_down_mitigation, printk, me_hfs2::progress_code, me_hfsts2::progress_code, me_hfsts1::update_in_progress, me_hfs::update_in_progress, me_hfsts1::working_state, and me_hfs::working_state.

Referenced by intel_early_me_status(), intel_me_path(), mainboard_romstage_entry(), and pch_finalize_script().

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◆ send_global_reset()

int send_global_reset ( void  )

Definition at line 341 of file me.c.

References cse_request_global_reset(), me_hfsts1::data, me_hfsts1::fields, is_cse_enabled(), me_read_config32(), me_hfsts1::operation_mode, and PCI_ME_HFSTS1.

Referenced by do_global_reset().

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Variable Documentation

◆ me_cws_values

const char* const me_cws_values[]
static
Initial value:
= {
[ME_HFS_CWS_RESET] = "Reset",
[ME_HFS_CWS_INIT] = "Initializing",
[ME_HFS_CWS_REC] = "Recovery",
[3] = "Unknown (3)",
[4] = "Unknown (4)",
[ME_HFS_CWS_NORMAL] = "Normal",
[ME_HFS_CWS_WAIT] = "Platform Disable Wait",
[ME_HFS_CWS_TRANS] = "OP State Transition",
[ME_HFS_CWS_INVALID] = "Invalid CPU Plugged In",
[9] = "Unknown (9)",
[10] = "Unknown (10)",
[11] = "Unknown (11)",
[12] = "Unknown (12)",
[13] = "Unknown (13)",
[14] = "Unknown (14)",
[15] = "Unknown (15)",
}
#define ME_HFS_CWS_REC
Definition: me.h:21
#define ME_HFS_CWS_RESET
Definition: me.h:19
#define ME_HFS_CWS_NORMAL
Definition: me.h:22
#define ME_HFS_CWS_INIT
Definition: me.h:20
#define ME_HFS_CWS_WAIT
Definition: me.h:23
#define ME_HFS_CWS_TRANS
Definition: me.h:24
#define ME_HFS_CWS_INVALID
Definition: me.h:25

Definition at line 14 of file me.c.

Referenced by intel_me_status().

◆ me_error_values

const char* const me_error_values[]
static
Initial value:
= {
[ME_HFS_ERROR_NONE] = "No Error",
[ME_HFS_ERROR_UNCAT] = "Uncategorized Failure",
[ME_HFS_ERROR_IMAGE] = "Image Failure",
[ME_HFS_ERROR_DEBUG] = "Debug Failure"
}
#define ME_HFS_ERROR_IMAGE
Definition: me.h:34
#define ME_HFS_ERROR_UNCAT
Definition: me.h:33
#define ME_HFS_ERROR_DEBUG
Definition: me.h:35
#define ME_HFS_ERROR_NONE
Definition: me.h:32

Definition at line 53 of file me.c.

Referenced by intel_me_status().

◆ me_opmode_values

const char* const me_opmode_values[]
static
Initial value:
= {
[ME_HFS_MODE_NORMAL] = "Normal",
[ME_HFS_MODE_DEBUG] = "Debug",
[ME_HFS_MODE_DIS] = "Soft Temporary Disable",
[ME_HFS_MODE_OVER_JMPR] = "Security Override via Jumper",
[ME_HFS_MODE_OVER_MEI] = "Security Override via MEI Message"
}
#define ME_HFS_MODE_NORMAL
Definition: me.h:36
#define ME_HFS_MODE_DIS
Definition: me.h:38
#define ME_HFS_MODE_OVER_MEI
Definition: me.h:40
#define ME_HFS_MODE_OVER_JMPR
Definition: me.h:39
#define ME_HFS_MODE_DEBUG
Definition: me.h:37

Definition at line 44 of file me.c.

Referenced by intel_me_status().

◆ me_opstate_values

const char* const me_opstate_values[]
static
Initial value:
= {
[ME_HFS_STATE_PREBOOT] = "Preboot",
[ME_HFS_STATE_M0_UMA] = "M0 with UMA",
[ME_HFS_STATE_M3] = "M3 without UMA",
[ME_HFS_STATE_M0] = "M0 without UMA",
[ME_HFS_STATE_BRINGUP] = "Bring up",
[ME_HFS_STATE_ERROR] = "M0 without UMA but with error"
}
#define ME_HFS_STATE_M0
Definition: me.h:29
#define ME_HFS_STATE_M0_UMA
Definition: me.h:27
#define ME_HFS_STATE_PREBOOT
Definition: me.h:26
#define ME_HFS_STATE_M3
Definition: me.h:28
#define ME_HFS_STATE_BRINGUP
Definition: me.h:30
#define ME_HFS_STATE_ERROR
Definition: me.h:31

Definition at line 34 of file me.c.

Referenced by intel_me_status().

◆ me_pmevent_values

const char* const me_pmevent_values[]
static

Definition at line 74 of file me.c.

Referenced by intel_me_status().

◆ me_progress_bup_values

const char* const me_progress_bup_values[]
static

Definition at line 117 of file me.c.

Referenced by intel_me_status().

◆ me_progress_rom_values

const char* const me_progress_rom_values[]
static
Initial value:
= {
}
#define ME_HFS2_STATE_ROM_DISABLE
Definition: me.h:112
#define ME_HFS2_STATE_ROM_BEGIN
Definition: me.h:111

Definition at line 111 of file me.c.

Referenced by intel_me_status().

◆ me_progress_values

const char* const me_progress_values[]
static
Initial value:
= {
[ME_HFS2_PHASE_ROM] = "ROM Phase",
[1] = "Unknown (1)",
[ME_HFS2_PHASE_UKERNEL] = "uKernel Phase",
[ME_HFS2_PHASE_BUP] = "BUP Phase",
[4] = "Unknown (4)",
[5] = "Unknown (5)",
[ME_HFS2_PHASE_HOST_COMM] = "Host Communication",
[7] = "Unknown (7)",
[8] = "Unknown (8)"
}
#define ME_HFS2_PHASE_BUP
Definition: me.h:103
#define ME_HFS2_PHASE_HOST_COMM
Definition: me.h:108
#define ME_HFS2_PHASE_UKERNEL
Definition: me.h:104
#define ME_HFS2_PHASE_ROM
Definition: me.h:102

Definition at line 61 of file me.c.

Referenced by intel_me_status().