coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
mainboard.c
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <baseboard/variants.h>
4 #include <chip.h>
5 #include <device/device.h>
6 #include <device/pci_ids.h>
7 #include <device/pci_ops.h>
9 
10 #define PL2_AML 18
11 #define PL2_KBL 15
12 
13 static uint32_t get_pl2(void)
14 {
15  struct device *igd_dev = pcidev_path_on_root(SA_DEVFN_IGD);
16  uint16_t id;
17 
18  id = pci_read_config16(igd_dev, PCI_DEVICE_ID);
19  /* Assume we only have KLB-Y and AML-Y SKUs */
21  return PL2_KBL;
22 
23  return PL2_AML;
24 }
25 
26 /* Override dev tree settings per board */
28 {
29  struct soc_power_limits_config *soc_conf;
30  config_t *cfg = config_of_soc();
31 
32  soc_conf = &cfg->power_limits_config;
33  /* Update PL2 based on CPU */
34  soc_conf->tdp_pl2_override = get_pl2();
35 }
DEVTREE_CONST struct device * pcidev_path_on_root(pci_devfn_t devfn)
Definition: device_const.c:255
void __weak variant_devtree_update(void)
Definition: mainboard.c:86
#define PL2_KBL
Definition: mainboard.c:11
#define PL2_AML
Definition: mainboard.c:10
static uint32_t get_pl2(void)
Definition: mainboard.c:13
#define config_of_soc()
Definition: device.h:394
static __always_inline u16 pci_read_config16(const struct device *dev, u16 reg)
Definition: pci_ops.h:52
#define PCI_DEVICE_ID
Definition: pci_def.h:9
#define PCI_DID_INTEL_KBL_GT2_SULXM
Definition: pci_ids.h:3838
#define SA_DEVFN_IGD
Definition: pci_devs.h:32
unsigned short uint16_t
Definition: stdint.h:11
unsigned int uint32_t
Definition: stdint.h:14
Definition: device.h:107