coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
mainboard.c
Go to the documentation of this file.
1
/* SPDX-License-Identifier: GPL-2.0-only */
2
3
#include <baseboard/variants.h>
4
#include <chip.h>
5
#include <
device/device.h
>
6
#include <
device/pci_ids.h
>
7
#include <
device/pci_ops.h
>
8
#include <
intelblocks/power_limit.h
>
9
10
#define PL2_AML 18
11
#define PL2_KBL 15
12
13
static
uint32_t
get_pl2
(
void
)
14
{
15
struct
device
*igd_dev =
pcidev_path_on_root
(
SA_DEVFN_IGD
);
16
uint16_t
id;
17
18
id
=
pci_read_config16
(igd_dev,
PCI_DEVICE_ID
);
19
/* Assume we only have KLB-Y and AML-Y SKUs */
20
if
(
id
==
PCI_DID_INTEL_KBL_GT2_SULXM
)
21
return
PL2_KBL
;
22
23
return
PL2_AML
;
24
}
25
26
/* Override dev tree settings per board */
27
void
variant_devtree_update
(
void
)
28
{
29
struct
soc_power_limits_config
*soc_conf;
30
config_t
*cfg =
config_of_soc
();
31
32
soc_conf = &cfg->power_limits_config;
33
/* Update PL2 based on CPU */
34
soc_conf->
tdp_pl2_override
=
get_pl2
();
35
}
pcidev_path_on_root
DEVTREE_CONST struct device * pcidev_path_on_root(pci_devfn_t devfn)
Definition:
device_const.c:255
variant_devtree_update
void __weak variant_devtree_update(void)
Definition:
mainboard.c:86
PL2_KBL
#define PL2_KBL
Definition:
mainboard.c:11
PL2_AML
#define PL2_AML
Definition:
mainboard.c:10
get_pl2
static uint32_t get_pl2(void)
Definition:
mainboard.c:13
device.h
config_of_soc
#define config_of_soc()
Definition:
device.h:394
pci_ops.h
pci_read_config16
static __always_inline u16 pci_read_config16(const struct device *dev, u16 reg)
Definition:
pci_ops.h:52
PCI_DEVICE_ID
#define PCI_DEVICE_ID
Definition:
pci_def.h:9
pci_ids.h
PCI_DID_INTEL_KBL_GT2_SULXM
#define PCI_DID_INTEL_KBL_GT2_SULXM
Definition:
pci_ids.h:3838
power_limit.h
SA_DEVFN_IGD
#define SA_DEVFN_IGD
Definition:
pci_devs.h:32
uint16_t
unsigned short uint16_t
Definition:
stdint.h:11
uint32_t
unsigned int uint32_t
Definition:
stdint.h:14
device
Definition:
device.h:107
ec_kontron_it8516e_config
Definition:
chip.h:8
soc_power_limits_config
Definition:
power_limit.h:20
soc_power_limits_config::tdp_pl2_override
uint16_t tdp_pl2_override
Definition:
power_limit.h:24
src
mainboard
google
poppy
variants
atlas
mainboard.c
Generated by
1.9.1