coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <cbmem.h>
#include <commonlib/helpers.h>
#include <console/console.h>
#include <device/pci_ops.h>
#include <stdint.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <acpi/acpi.h>
#include <cpu/intel/smm_reloc.h>
#include "i945.h"
Go to the source code of this file.
Functions | |
static void | mch_domain_read_resources (struct device *dev) |
static void | mch_domain_set_resources (struct device *dev) |
static const char * | northbridge_acpi_name (const struct device *dev) |
void | northbridge_write_smram (u8 smram) |
static void | mc_read_resources (struct device *dev) |
static void | enable_dev (struct device *dev) |
Variables | |
static struct device_operations | pci_domain_ops |
static struct device_operations | mc_ops |
static const unsigned short | pci_device_ids [] |
static const struct pci_driver mc_driver | __pci_driver |
static struct device_operations | cpu_bus_ops |
struct chip_operations | northbridge_intel_i945_ops |
Definition at line 163 of file northbridge.c.
References cpu_bus_ops, DEVICE_PATH_CPU_CLUSTER, DEVICE_PATH_DOMAIN, device::ops, device::path, pci_domain_ops, and device_path::type.
Definition at line 131 of file northbridge.c.
Definition at line 15 of file northbridge.c.
References BIOS_DEBUG, BIOS_INFO, BIOS_SPEW, cbmem_top(), decode_igd_memory_size(), decode_tseg_size(), ESMRAMC, find_pci_tolm(), GGC, KiB, device::link_list, MiB, mmio_resource, pci_domain_read_resources(), pci_read_config16(), pci_read_config8(), pcidev_on_root(), printk, ram_resource, reserved_ram_resource, TOLUD, uma_memory_base, uma_memory_size, and uma_resource.
Definition at line 88 of file northbridge.c.
References assign_resources(), device::link_list, resource::next, report_resource_stored(), and device::resource_list.
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Definition at line 98 of file northbridge.c.
References device::bus, pci_path::devfn, DEVICE_PATH_DOMAIN, DEVICE_PATH_PCI, NULL, device::path, device_path::pci, PCI_DEVFN, bus::secondary, and device_path::type.
Definition at line 114 of file northbridge.c.
References die(), NULL, pci_write_config8(), pcidev_on_root(), and SMRAM.
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Definition at line 146 of file northbridge.c.
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Definition at line 146 of file northbridge.c.
Referenced by enable_dev().
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Definition at line 131 of file northbridge.c.
struct chip_operations northbridge_intel_i945_ops |
Definition at line 163 of file northbridge.c.
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Definition at line 146 of file northbridge.c.
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Definition at line 114 of file northbridge.c.
Referenced by enable_dev().