coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
smihandler.c
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <acpi/acpi.h>
4 #include <arch/io.h>
5 #include <console/console.h>
6 #include <cpu/x86/smm.h>
7 #include <soc/pm.h>
8 #include <elog.h>
11 #include <soc/iomap.h>
12 #include <soc/nvs.h>
13 #include "ec.h"
14 #include <variant/onboard.h>
15 
16 static u8 mainboard_smi_ec(void)
17 {
19  u32 pm1_cnt;
20 
21  /* Log this event */
22  if (cmd)
24 
25  switch (cmd) {
27  printk(BIOS_DEBUG, "LID CLOSED, SHUTDOWN\n");
28 
29  /* Go to S5 */
30  pm1_cnt = inl(ACPI_BASE_ADDRESS + PM1_CNT);
31  pm1_cnt |= (0xf << 10);
32  outl(pm1_cnt, ACPI_BASE_ADDRESS + PM1_CNT);
33  break;
34  }
35 
36  return cmd;
37 }
38 
39 /* gpi_sts is GPIO 47:32 */
40 void mainboard_smi_gpi(u32 gpi_sts)
41 {
42  if (gpi_sts & (1 << (EC_SMI_GPI - 32))) {
43  /* Process all pending events */
44  while (mainboard_smi_ec() != 0)
45  ;
46  }
47 }
48 
49 static void mainboard_disable_gpios(void)
50 {
51 #if CONFIG(BOARD_GOOGLE_SAMUS)
52  /* Put SSD in reset to prevent leak */
54  /* Disable LTE */
56 #else
58 #endif
59  /* Prevent leak from standby rail to WLAN rail */
61 }
62 
63 void mainboard_smi_sleep(u8 slp_typ)
64 {
65  /* Disable USB charging if required */
66  switch (slp_typ) {
67  case ACPI_S3:
68  if (gnvs->s3u0 == 0) {
73  }
74 
76 
77  /* Enable wake events */
79  break;
80  case ACPI_S5:
81  if (gnvs->s5u0 == 0) {
86  }
87 
89 
90  /* Enable wake events */
92  break;
93  }
94 
95  /* Disable SCI and SMI events */
98 
99  /* Clear pending events that may trigger immediate wake */
101  ;
102 }
103 
105 {
106  switch (apmc) {
107  case APM_CNT_ACPI_ENABLE:
109  /* Clear all pending events */
111  ;
113  break;
116  /* Clear all pending events */
118  ;
120  break;
121  }
122  return 0;
123 }
#define PM1_CNT
Definition: pm.h:27
#define ELOG_TYPE_EC_EVENT
Definition: elog.h:90
#define printk(level,...)
Definition: stdlib.h:16
void __weak mainboard_smi_sleep(u8 slp_typ)
Definition: smihandler.c:210
int __weak mainboard_smi_apmc(u8 data)
Definition: smihandler.c:209
void __weak mainboard_smi_gpi(u32 gpi_sts)
Definition: smihandler.c:208
u32 inl(u16 port)
void outl(u32 val, u16 port)
int google_chromeec_set_wake_mask(uint64_t mask)
Definition: ec.c:1131
int google_chromeec_set_smi_mask(uint64_t mask)
Definition: ec.c:1125
int google_chromeec_set_usb_charge_mode(uint8_t port_id, enum usb_charge_mode mode)
Definition: ec.c:1143
int google_chromeec_set_sci_mask(uint64_t mask)
Definition: ec.c:1119
enum host_event_code google_chromeec_get_event(void)
Definition: ec_i2c.c:242
@ EC_HOST_EVENT_NONE
Definition: ec_commands.h:654
@ EC_HOST_EVENT_LID_CLOSED
Definition: ec_commands.h:655
@ USB_CHARGE_MODE_DISABLED
Definition: ec_commands.h:3240
#define BOARD_PP3300_CODEC_GPIO
Definition: onboard.h:13
#define BOARD_WLAN_DISABLE_GPIO
Definition: onboard.h:14
#define BOARD_LTE_DISABLE_GPIO
Definition: onboard.h:17
#define BOARD_SSD_RESET_GPIO
Definition: onboard.h:16
@ ACPI_S5
Definition: acpi.h:1385
@ ACPI_S3
Definition: acpi.h:1383
#define APM_CNT_ACPI_DISABLE
Definition: smm.h:21
#define APM_CNT_ACPI_ENABLE
Definition: smm.h:22
static int elog_gsmi_add_event_byte(u8 event_type, u8 data)
Definition: elog.h:46
#define ACPI_BASE_ADDRESS
Definition: iomap.h:99
#define BIOS_DEBUG
BIOS_DEBUG - Verbose output.
Definition: loglevel.h:128
#define MAINBOARD_EC_S5_WAKE_EVENTS
Definition: ec.h:32
#define MAINBOARD_EC_SCI_EVENTS
Definition: ec.h:12
#define MAINBOARD_EC_SMI_EVENTS
Definition: ec.h:28
#define EC_SMI_GPI
Definition: ec.h:10
#define MAINBOARD_EC_S3_WAKE_EVENTS
Definition: ec.h:37
static u8 mainboard_smi_ec(void)
Definition: smihandler.c:16
static void mainboard_disable_gpios(void)
Definition: smihandler.c:49
struct global_nvs * gnvs
void set_gpio(int gpio_num, int value)
Definition: gpio.c:125
uint32_t u32
Definition: stdint.h:51
uint8_t u8
Definition: stdint.h:45
u8 s3u0
Definition: nvs.h:34
u8 s5u0
Definition: nvs.h:32