coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
sd.c
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <device/device.h>
4 #include <device/pci.h>
5 #include <device/pci_ids.h>
6 #include <device/pci_ops.h>
7 
8 #include "chip.h"
9 #include "hudson.h"
10 
11 static void sd_init(struct device *dev)
12 {
13  struct southbridge_amd_pi_hudson_config *sd_chip = dev->chip_info;
14  u32 stepping = pci_read_config32(pcidev_on_root(0x18, 3), 0xFC);
15  u8 sd_mode = 0;
16 
17  if (sd_chip)
18  sd_mode = sd_chip->sd_mode;
19 
20  if (sd_mode == 3) { /* SD 3.0 mode */
21  pci_write_config32(dev, 0xA4, 0x31FEC8B2);
22  pci_write_config32(dev, 0xA8, 0x00002503);
23  pci_write_config32(dev, 0xB0, 0x02180C19);
24  pci_write_config32(dev, 0xD0, 0x0000078B);
25  }
26  else { /* SD 2.0 mode */
27  if ((stepping & 0x0000000F) == 0) { /* Stepping A0 */
28  pci_write_config32(dev, 0xA4, 0x31DE32B2);
29  pci_write_config32(dev, 0xB0, 0x01180C19);
30  pci_write_config32(dev, 0xD0, 0x0000058B);
31  }
32  else { /* Stepping >= A1 */
33  pci_write_config32(dev, 0xA4, 0x31FE32B2);
34  pci_write_config32(dev, 0xA8, 0x00000070);
35  pci_write_config32(dev, 0xB0, 0x01180C19);
36  pci_write_config32(dev, 0xD0, 0x0000078B);
37  }
38  }
39 }
40 
41 static struct device_operations sd_ops = {
43  .set_resources = pci_dev_set_resources,
44  .enable_resources = pci_dev_enable_resources,
45  .init = sd_init,
46 };
47 
48 static const struct pci_driver sd_driver __pci_driver = {
49  .ops = &sd_ops,
50  .vendor = PCI_VID_AMD,
51  .device = PCI_DID_AMD_YANGTZE_SD,
52 };
DEVTREE_CONST struct device * pcidev_on_root(uint8_t dev, uint8_t fn)
Definition: device_const.c:260
static __always_inline void pci_write_config32(const struct device *dev, u16 reg, u32 val)
Definition: pci_ops.h:76
static __always_inline u32 pci_read_config32(const struct device *dev, u16 reg)
Definition: pci_ops.h:58
void pci_dev_enable_resources(struct device *dev)
Definition: pci_device.c:721
void pci_dev_read_resources(struct device *dev)
Definition: pci_device.c:534
void pci_dev_set_resources(struct device *dev)
Definition: pci_device.c:691
#define PCI_VID_AMD
Definition: pci_ids.h:496
#define PCI_DID_AMD_YANGTZE_SD
Definition: pci_ids.h:540
const char * stepping
static struct device_operations sd_ops
Definition: sd.c:41
static const struct pci_driver sd_driver __pci_driver
Definition: sd.c:48
static void sd_init(struct device *dev)
Definition: sd.c:11
uint32_t u32
Definition: stdint.h:51
uint8_t u8
Definition: stdint.h:45
void(* read_resources)(struct device *dev)
Definition: device.h:39
Definition: device.h:107
DEVTREE_CONST void * chip_info
Definition: device.h:164