coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
timer.h
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/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef __SOC_ROCKCHIP_RK3288_TIMER_H__
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#define __SOC_ROCKCHIP_RK3288_TIMER_H__
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#include <
stdint.h
>
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#include <soc/addressmap.h>
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#include <soc/clock.h>
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#include <
timer.h
>
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static
const
u32
clocks_per_usec
=
OSC_HZ
/
USECS_PER_SEC
;
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struct
rk3288_timer
{
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u32
timer_load_count0
;
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u32
timer_load_count1
;
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u32
timer_curr_value0
;
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u32
timer_curr_value1
;
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u32
timer_ctrl_reg
;
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u32
timer_int_status
;
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};
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static
struct
rk3288_timer
*
const
timer7_ptr
= (
void
*)
TIMER7_BASE
;
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#define TIMER_LOAD_VAL 0xffffffff
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#endif
/* __SOC_ROCKCHIP_RK3288_TIMER_H__ */
USECS_PER_SEC
#define USECS_PER_SEC
Definition:
timer.h:8
TIMER7_BASE
#define TIMER7_BASE
Definition:
addressmap.h:64
OSC_HZ
#define OSC_HZ
Definition:
clock.h:9
clocks_per_usec
static const u32 clocks_per_usec
Definition:
timer.h:11
timer7_ptr
static struct rk3288_timer *const timer7_ptr
Definition:
timer.h:22
timer.h
stdint.h
u32
uint32_t u32
Definition:
stdint.h:51
rk3288_timer
Definition:
timer.h:13
rk3288_timer::timer_load_count0
u32 timer_load_count0
Definition:
timer.h:14
rk3288_timer::timer_load_count1
u32 timer_load_count1
Definition:
timer.h:15
rk3288_timer::timer_int_status
u32 timer_int_status
Definition:
timer.h:19
rk3288_timer::timer_curr_value0
u32 timer_curr_value0
Definition:
timer.h:16
rk3288_timer::timer_curr_value1
u32 timer_curr_value1
Definition:
timer.h:17
rk3288_timer::timer_ctrl_reg
u32 timer_ctrl_reg
Definition:
timer.h:18
src
soc
rockchip
rk3288
include
soc
timer.h
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