coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
northbridge.c File Reference
#include <cbmem.h>
#include <console/console.h>
#include <device/pci_def.h>
#include <device/pci_ops.h>
#include <stdint.h>
#include <device/device.h>
#include <boot/tables.h>
#include <acpi/acpi.h>
#include <northbridge/intel/x4x/memmap.h>
#include <northbridge/intel/x4x/chip.h>
#include <northbridge/intel/x4x/x4x.h>
#include <cpu/intel/smm_reloc.h>
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Functions

static void mch_domain_read_resources (struct device *dev)
 
static void mch_domain_set_resources (struct device *dev)
 
static void mch_domain_init (struct device *dev)
 
static const char * northbridge_acpi_name (const struct device *dev)
 
void northbridge_write_smram (u8 smram)
 
static void enable_dev (struct device *dev)
 
static void hide_pci_fn (const int dev_bit_base, const struct device *dev)
 
static void hide_pci_dev (const int dev, int functions, const int dev_bit_base)
 
static void x4x_init (void *const chip_info)
 

Variables

static const int legacy_hole_base_k = 0xa0000 / 1024
 
static struct device_operations pci_domain_ops
 
static struct device_operations cpu_bus_ops
 
struct chip_operations northbridge_intel_x4x_ops
 

Function Documentation

◆ enable_dev()

static void enable_dev ( struct device dev)
static

◆ hide_pci_dev()

static void hide_pci_dev ( const int  dev,
int  functions,
const int  dev_bit_base 
)
static

Definition at line 190 of file northbridge.c.

References hide_pci_fn(), and pcidev_on_root().

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◆ hide_pci_fn()

static void hide_pci_fn ( const int  dev_bit_base,
const struct device dev 
)
static

Definition at line 181 of file northbridge.c.

References D0F0_DEVEN, pci_path::devfn, device::enabled, device::path, device_path::pci, PCI_FUNC, pci_update_config32(), and pcidev_on_root().

Referenced by hide_pci_dev().

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◆ mch_domain_init()

static void mch_domain_init ( struct device dev)
static

Definition at line 124 of file northbridge.c.

References PCI_COMMAND, PCI_COMMAND_SERR, and pci_or_config16().

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◆ mch_domain_read_resources()

◆ mch_domain_set_resources()

static void mch_domain_set_resources ( struct device dev)
static

Definition at line 114 of file northbridge.c.

References assign_resources(), device::link_list, resource::next, report_resource_stored(), and device::resource_list.

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◆ northbridge_acpi_name()

static const char* northbridge_acpi_name ( const struct device dev)
static

◆ northbridge_write_smram()

void northbridge_write_smram ( u8  smram)

Definition at line 146 of file northbridge.c.

References PCI_DEV, pci_write_config8(), and SMRAMC.

Referenced by smm_lock().

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◆ x4x_init()

static void x4x_init ( void *const  chip_info)
static

Definition at line 196 of file northbridge.c.

Variable Documentation

◆ cpu_bus_ops

struct device_operations cpu_bus_ops
static
Initial value:
= {
.read_resources = noop_read_resources,
.set_resources = noop_set_resources,
.init = mp_cpu_bus_init,
}
static void noop_read_resources(struct device *dev)
Standard device operations function pointers shims.
Definition: device.h:73
static void noop_set_resources(struct device *dev)
Definition: device.h:74
static void mp_cpu_bus_init(struct device *dev)
Definition: device.h:240

Definition at line 146 of file northbridge.c.

Referenced by enable_dev().

◆ legacy_hole_base_k

const int legacy_hole_base_k = 0xa0000 / 1024
static

Definition at line 16 of file northbridge.c.

Referenced by mch_domain_read_resources().

◆ northbridge_intel_x4x_ops

struct chip_operations northbridge_intel_x4x_ops
Initial value:
= {
.enable_dev = enable_dev,
.init = x4x_init,
}
static void enable_dev(struct device *dev)
Definition: northbridge.c:172
static void x4x_init(void *const chip_info)
Definition: northbridge.c:196

Definition at line 196 of file northbridge.c.

◆ pci_domain_ops

struct device_operations pci_domain_ops
static
Initial value:
= {
.read_resources = mch_domain_read_resources,
.set_resources = mch_domain_set_resources,
.init = mch_domain_init,
.scan_bus = pci_domain_scan_bus,
.write_acpi_tables = northbridge_write_acpi_tables,
.acpi_fill_ssdt = generate_cpu_entries,
.acpi_name = northbridge_acpi_name,
}
void generate_cpu_entries(const struct device *device)
Definition: acpi.c:334
unsigned long northbridge_write_acpi_tables(struct device *device, unsigned long start)
static void mch_domain_set_resources(struct device *dev)
Definition: northbridge.c:114
static void mch_domain_read_resources(struct device *dev)
Definition: northbridge.c:18
static void mch_domain_init(struct device *dev)
Definition: northbridge.c:124
static const char * northbridge_acpi_name(const struct device *dev)
Definition: northbridge.c:130
void pci_domain_scan_bus(struct device *dev)
Scan a PCI domain.
Definition: pci_device.c:1610

Definition at line 146 of file northbridge.c.

Referenced by enable_dev().