coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <bootstate.h>
#include <console/console.h>
#include <device/mmio.h>
#include <device/device.h>
#include <intelblocks/pmc.h>
#include <intelblocks/pmclib.h>
#include <intelblocks/rtc.h>
#include <soc/pci_devs.h>
#include <soc/pm.h>
#include <soc/soc_chip.h>
Go to the source code of this file.
Functions | |
static void | config_deep_sX (uint32_t offset, uint32_t mask, int sx, int enable) |
static void | config_deep_s5 (int on_ac, int on_dc) |
static void | config_deep_s3 (int on_ac, int on_dc) |
static void | config_deep_sx (uint32_t deepsx_config) |
static void | pmc_init (void *unused) |
BOOT_STATE_INIT_ENTRY (BS_DEV_INIT_CHIPS, BS_ON_EXIT, pmc_init, NULL) | |
BOOT_STATE_INIT_ENTRY | ( | BS_DEV_INIT_CHIPS | , |
BS_ON_EXIT | , | ||
pmc_init | , | ||
NULL | |||
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static |
Definition at line 38 of file pmc.c.
References config_deep_sX(), S3_PWRGATE_POL, S3AC_GATE_SUS, and S3DC_GATE_SUS.
Referenced by pmc_init().
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static |
Definition at line 29 of file pmc.c.
References config_deep_sX(), S4_PWRGATE_POL, S4AC_GATE_SUS, S4DC_GATE_SUS, S5_PWRGATE_POL, S5AC_GATE_SUS, and S5DC_GATE_SUS.
Referenced by pmc_init().
Definition at line 44 of file pmc.c.
References DSX_CFG, DSX_CFG_MASK, pmc_mmio_regs(), read32(), and write32().
Referenced by pmc_init().
Definition at line 14 of file pmc.c.
References BIOS_DEBUG, mask, offset, pmc_mmio_regs(), printk, read32(), and write32().
Referenced by config_deep_s3(), and config_deep_s5().
Definition at line 55 of file pmc.c.
References ACPI_TIM_DIS, config, CONFIG, config_deep_s3(), config_deep_s5(), config_deep_sx(), config_of_soc, PCH_PWRM_ACPI_TMR_CTL, pmc_clear_pmcon_sts(), pmc_gpe_init(), pmc_mmio_regs(), pmc_set_acpi_mode(), pmc_set_power_failure_state(), rtc_init(), and setbits8.