coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
gpio.c
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1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 
3 #include <baseboard/gpio.h>
4 #include <baseboard/variants.h>
5 #include <commonlib/helpers.h>
6 
7 /* Pad configuration in ramstage */
8 static const struct pad_config gpio_table[] = {
9  /* C18 : AP_I2C_EMR_SDA */
11  /* C19 : AP_I2C_EMR_SCL */
13 
14  /* D12 : WCAM_RST_L */
16  /* D13 : EN_PP2800_CAMERA */
17  PAD_CFG_GPO(GPP_D13, 1, PLTRST),
18  /* D14 : EN_PP1200_CAMERA */
20  /* D15 : UCAM_RST_L */
22  /* D19 : WWAN_WLAN_COEX1 */
24  /* D20 : WWAN_WLAN_COEX2 */
26  /* D21 : WWAN_WLAN_COEX3 */
28 
29  /* E0 : CLK_24M_UCAM */
30  PAD_NC(GPP_E0, NONE),
31  /* E2 : CLK_24M_WCAM */
32  PAD_NC(GPP_E2, NONE),
33 
34  /* H6 : AP_I2C_CAM_SDA */
35  PAD_NC(GPP_H6, NONE),
36  /* H7 : AP_I2C_CAM_SCL */
37  PAD_NC(GPP_H7, NONE),
38 };
39 
40 const struct pad_config *variant_override_gpio_table(size_t *num)
41 {
42  *num = ARRAY_SIZE(gpio_table);
43  return gpio_table;
44 }
#define GPP_E0
#define GPP_D14
#define GPP_D12
#define GPP_H6
#define GPP_H7
#define GPP_C18
#define GPP_E2
#define GPP_D13
#define GPP_C19
#define GPP_D19
#define GPP_D15
#define ARRAY_SIZE(a)
Definition: helpers.h:12
#define GPP_D21
#define GPP_D20
const struct pad_config *__weak variant_override_gpio_table(size_t *num)
Definition: gpio.c:450
static const struct pad_config gpio_table[]
Definition: gpio.c:8
#define PAD_NC(pin)
Definition: gpio_defs.h:263
#define PAD_CFG_GPO(pad, val, rst)
Definition: gpio_defs.h:247