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coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <assert.h>
#include <gpio.h>
#include <soc/spi.h>
#include <spi_bitbang.h>
#include <spi_flash.h>
#include <stddef.h>
Go to the source code of this file.
Data Structures | |
struct | rockchip_bitbang_slave |
Functions | |
static int | get_miso (const struct spi_bitbang_ops *ops) |
static void | set_mosi (const struct spi_bitbang_ops *ops, int value) |
static void | set_clk (const struct spi_bitbang_ops *ops, int value) |
static void | set_cs (const struct spi_bitbang_ops *ops, int value) |
void | rockchip_spi_init (unsigned int bus, unsigned int ignored_speed_hz) |
void | rockchip_spi_set_sample_delay (unsigned int bus, unsigned int delay_ns) |
static int | spi_ctrlr_claim_bus (const struct spi_slave *slave) |
static void | spi_ctrlr_release_bus (const struct spi_slave *slave) |
static int | spi_ctrlr_xfer (const struct spi_slave *slave, const void *dout, size_t bytes_out, void *din, size_t bytes_in) |
Variables | |
static const struct rockchip_bitbang_slave | slaves [] |
static const struct spi_ctrlr | spi_ctrlr |
const struct spi_ctrlr_buses | spi_ctrlr_bus_map [] |
const size_t | spi_ctrlr_bus_map_count = ARRAY_SIZE(spi_ctrlr_bus_map) |
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Definition at line 21 of file spi_bitbang.c.
References container_of, gpio_get(), ops, and slave.
Definition at line 95 of file spi_bitbang.c.
References ARRAY_SIZE, assert, rockchip_bitbang_slave::clk, rockchip_bitbang_slave::cs, rockchip_spi::ctrlr0, gpio_input(), gpio_output(), rockchip_bitbang_slave::miso, rockchip_bitbang_slave::mosi, rockchip_spi_slave::regs, rkclk_configure_spi(), rockchip_spi_enable_chip(), rockchip_spi_set_clk(), rockchip_spi_slaves, slaves, SPI_CSM_KEEP, SPI_CSM_OFFSET, SPI_DFS_8BIT, SPI_DFS_OFFSET, SPI_FBM_MSB, SPI_FBM_OFFSET, SPI_FIFO_DEPTH, SPI_FRF_OFFSET, SPI_FRF_SPI, SPI_OMOD_MASTER, SPI_OMOD_OFFSET, SPI_SEM_LITTLE, SPI_SEM_OFFSET, SPI_SRCCLK_HZ, SPI_SSN_DELAY_OFFSET, SPI_SSN_DELAY_ONE, and write32().
Referenced by bootblock_mainboard_init(), configure_ec(), configure_spi_flash(), and configure_tpm().
Definition at line 105 of file spi_bitbang.c.
References ARRAY_SIZE, assert, clrsetbits32, DIV_ROUND_CLOSEST, GHz, rockchip_spi_slave::regs, rockchip_spi_slaves, SPI_RXDSD_MASK, SPI_RXDSD_OFFSET, and SPI_SRCCLK_HZ.
Referenced by configure_spi_flash().
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Definition at line 35 of file spi_bitbang.c.
References container_of, gpio_set(), ops, slave, and value.
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Definition at line 42 of file spi_bitbang.c.
References container_of, spi_slave::cs, gpio_set(), ops, slave, and value.
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Definition at line 28 of file spi_bitbang.c.
References container_of, gpio_set(), ops, slave, and value.
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Definition at line 110 of file spi_bitbang.c.
References ARRAY_SIZE, assert, spi_slave::bus, rockchip_bitbang_slave::ops, slave, slaves, and spi_bitbang_claim_bus().
Definition at line 116 of file spi_bitbang.c.
References ARRAY_SIZE, assert, spi_slave::bus, rockchip_bitbang_slave::ops, slave, slaves, and spi_bitbang_release_bus().
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Definition at line 122 of file spi_bitbang.c.
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Definition at line 42 of file spi_bitbang.c.
Referenced by rockchip_spi_init(), spi_ctrlr_claim_bus(), and spi_ctrlr_release_bus().
Definition at line 122 of file spi_bitbang.c.
const struct spi_ctrlr_buses spi_ctrlr_bus_map[] |
Definition at line 122 of file spi_bitbang.c.
const size_t spi_ctrlr_bus_map_count = ARRAY_SIZE(spi_ctrlr_bus_map) |
Definition at line 145 of file spi_bitbang.c.