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coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <string.h>
#include <bootstate.h>
#include <commonlib/helpers.h>
#include <delay.h>
#include <device/mmio.h>
#include <device/pci_ops.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
#include <spi_flash.h>
#include <spi-generic.h>
#include <timer.h>
#include <types.h>
#include "spi.h"
Go to the source code of this file.
Data Structures | |
struct | ich7_spi_regs |
struct | ich9_spi_regs |
struct | ich_spi_controller |
struct | spi_transaction |
Macros | |
#define | __SIMPLE_DEVICE__ |
#define | HSFC_FCYCLE_OFF 1 /* 1-2: FLASH Cycle */ |
#define | HSFC_FCYCLE (0x3 << HSFC_FCYCLE_OFF) |
#define | HSFC_FDBC_OFF 8 /* 8-13: Flash Data Byte Count */ |
#define | HSFC_FDBC (0x3f << HSFC_FDBC_OFF) |
#define | readb_(a) read8(a) |
#define | readw_(a) read16(a) |
#define | readl_(a) read32(a) |
#define | writeb_(val, addr) write8(addr, val) |
#define | writew_(val, addr) write16(addr, val) |
#define | writel_(val, addr) write32(addr, val) |
#define | MENU_BYTES member_size(struct ich9_spi_regs, opmenu) |
#define | RCBA 0xf0 |
#define | SBASE 0x54 |
#define | SPI_FPR_SHIFT 12 |
#define | ICH7_SPI_FPR_MASK 0xfff |
#define | ICH9_SPI_FPR_MASK 0x1fff |
#define | SPI_FPR_BASE_SHIFT 0 |
#define | ICH7_SPI_FPR_LIMIT_SHIFT 12 |
#define | ICH9_SPI_FPR_LIMIT_SHIFT 16 |
#define | ICH9_SPI_FPR_RPE (1 << 15) /* Read Protect */ |
#define | SPI_FPR_WPE (1 << 31) /* Write Protect */ |
#define | BIOS_CNTL 0xdc |
#define | BIOS_CNTL_BIOSWE (1 << 0) |
#define | BIOS_CNTL_BLE (1 << 1) |
#define | BIOS_CNTL_SMM_BWP (1 << 5) |
Typedefs | |
typedef struct spi_transaction | spi_transaction |
Enumerations | |
enum | { SPIS_SCIP = 0x0001 , SPIS_GRANT = 0x0002 , SPIS_CDS = 0x0004 , SPIS_FCERR = 0x0008 , SSFS_AEL = 0x0010 , SPIS_LOCK = 0x8000 , SPIS_RESERVED_MASK = 0x7ff0 , SSFS_RESERVED_MASK = 0x7fe2 } |
enum | { SPIC_SCGO = 0x000002 , SPIC_ACS = 0x000004 , SPIC_SPOP = 0x000008 , SPIC_DBC = 0x003f00 , SPIC_DS = 0x004000 , SPIC_SME = 0x008000 , SSFC_SCF_MASK = 0x070000 , SSFC_RESERVED = 0xf80000 } |
enum | { HSFS_FDONE = 0x0001 , HSFS_FCERR = 0x0002 , HSFS_AEL = 0x0004 , HSFS_BERASE_MASK = 0x0018 , HSFS_BERASE_SHIFT = 3 , HSFS_SCIP = 0x0020 , HSFS_FDOPSS = 0x2000 , HSFS_FDV = 0x4000 , HSFS_FLOCKDN = 0x8000 } |
enum | { HSFC_FGO = 0x0001 , HSFC_FCYCLE_MASK = 0x0006 , HSFC_FCYCLE_SHIFT = 1 , HSFC_FDBC_MASK = 0x3f00 , HSFC_FDBC_SHIFT = 8 , HSFC_FSMIE = 0x8000 } |
enum | { SPI_OPCODE_TYPE_READ_NO_ADDRESS = 0 , SPI_OPCODE_TYPE_WRITE_NO_ADDRESS = 1 , SPI_OPCODE_TYPE_READ_WITH_ADDRESS = 2 , SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS = 3 } |
Variables | |
struct ich7_spi_regs | __packed |
static struct ich_spi_controller | cntlr |
static const struct spi_flash_ops | spi_flash_ops |
static const struct spi_ctrlr | spi_ctrlr |
const struct spi_ctrlr_buses | spi_ctrlr_bus_map [] |
const size_t | spi_ctrlr_bus_map_count = ARRAY_SIZE(spi_ctrlr_bus_map) |
#define HSFC_FCYCLE (0x3 << HSFC_FCYCLE_OFF) |
#define HSFC_FDBC (0x3f << HSFC_FDBC_OFF) |
#define MENU_BYTES member_size(struct ich9_spi_regs, opmenu) |
typedef struct spi_transaction spi_transaction |
anonymous enum |
anonymous enum |
anonymous enum |
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BOOT_STATE_INIT_ENTRY | ( | BS_DEV_INIT | , |
BS_ON_ENTRY | , | ||
spi_init_cb | , | ||
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Definition at line 265 of file spi.c.
References CONFIG, pci_read_config32(), RCBA, and SBASE.
Referenced by spi_init().
Definition at line 826 of file spi.c.
References cntlr, ich_spi_controller::data, and writel_.
Referenced by ich_hwseq_write().
Definition at line 717 of file spi.c.
References BIOS_DEBUG, BIOS_ERR, cntlr, ich9_spi_regs::hsfc, HSFC_FCYCLE, HSFC_FCYCLE_OFF, HSFC_FGO, ich9_spi_regs::hsfs, ich_spi_controller::ich9_spi, ich_hwseq_set_addr(), ich_hwseq_wait_for_cycle_complete(), offset, printk, readw_, spi_flash::sector_size, spi_flash::spi, spi_claim_bus(), spi_release_bus(), USECS_PER_MSEC, and writew_.
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Definition at line 780 of file spi.c.
References addr, BIOS_ERR, buf, cntlr, ich_spi_controller::databytes, ich9_spi_regs::hsfc, HSFC_FCYCLE, HSFC_FDBC, HSFC_FDBC_OFF, HSFC_FGO, ich9_spi_regs::hsfs, ich_spi_controller::ich9_spi, ich_hwseq_set_addr(), ich_hwseq_wait_for_cycle_complete(), ich_read_data(), MIN, printk, readw_, spi_flash::size, and writew_.
Definition at line 668 of file spi.c.
References addr, cntlr, ich9_spi_regs::faddr, ich_spi_controller::ich9_spi, readl_, and writel_.
Referenced by ich_hwseq_erase(), ich_hwseq_read(), ich_hwseq_write(), and spi_flash_programmer_probe().
Definition at line 679 of file spi.c.
References addr, BIOS_ERR, cntlr, ich9_spi_regs::faddr, ich9_spi_regs::hsfc, ich9_spi_regs::hsfs, HSFS_FCERR, HSFS_FDONE, ich_spi_controller::ich9_spi, printk, readl_, readw_, udelay(), and writew_.
Referenced by ich_hwseq_erase(), ich_hwseq_read(), and ich_hwseq_write().
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Definition at line 848 of file spi.c.
References addr, BIOS_DEBUG, BIOS_ERR, buf, cntlr, ich_spi_controller::databytes, ich9_spi_regs::hsfc, HSFC_FCYCLE, HSFC_FCYCLE_OFF, HSFC_FDBC, HSFC_FDBC_OFF, HSFC_FGO, ich9_spi_regs::hsfs, ich_spi_controller::ich9_spi, ich_fill_data(), ich_hwseq_set_addr(), ich_hwseq_wait_for_cycle_complete(), MIN, printk, readw_, spi_flash::size, and writew_.
Definition at line 767 of file spi.c.
References cntlr, ich_spi_controller::data, and readl_.
Referenced by ich_hwseq_read().
Definition at line 245 of file spi.c.
References ich_spi_controller::bbar, cntlr, readl_, and writel_.
Referenced by spi_init().
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Definition at line 491 of file spi.c.
References BIOS_DEBUG, cntlr, printk, readw_, ich_spi_controller::status, udelay(), and writew_.
Referenced by spi_ctrlr_xfer().
__weak void intel_southbridge_override_spi | ( | struct intel_swseq_spi_config * | spi_config | ) |
Definition at line 1099 of file spi.c.
Referenced by spi_finalize_ops().
Definition at line 230 of file spi.c.
References readb_, readl_, and value.
Referenced by spi_ctrlr_xfer(), spi_setup_opcode(), wait_for_state_idle(), and wait_for_state_ready().
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Definition at line 518 of file spi.c.
References ich_spi_controller::addr, BIOS_DEBUG, spi_transaction::bytesin, spi_transaction::bytesout, cntlr, ich_spi_controller::control, ich_spi_controller::data, ich_spi_controller::databytes, ich_status_poll(), spi_transaction::in, MIN, spi_transaction::offset, spi_transaction::opcode, spi_transaction::out, ich_spi_controller::preop, printk, read_reg(), readw_, spi_locked(), SPI_OPCODE_WREN, spi_setup_offset(), spi_setup_opcode(), spi_setup_type(), spi_use_in(), spi_use_out(), SPIC_ACS, SPIC_DS, SPIC_SCGO, SPIS_CDS, SPIS_FCERR, SPIS_SCIP, ich_spi_controller::status, write_reg(), writel_, and writew_.
Referenced by xfer_vectors().
Definition at line 1039 of file spi.c.
References ARRAY_SIZE, boot_device_spi_flash(), cntlr, CONFIG, intel_southbridge_override_spi(), spi_flash::model, ich_spi_controller::opmenu, ich_spi_controller::optype, ich_spi_controller::preop, READ_NO_ADDR, READ_WITH_ADDR, spi_locked(), spi_set_smm_only_flashing(), spi_flash::vendor, VENDOR_ID_SST, WRITE_NO_ADDR, WRITE_WITH_ADDR, writeb_, and writew_.
Referenced by broadwell_pch_finalize(), finalize_chipset(), and lpc_final().
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Definition at line 903 of file spi.c.
References BIOS_DEBUG, cntlr, CONFIG, ich_spi_controller::flcomp, ich_spi_controller::flmap0, ich_spi_controller::hsfs, HSFS_FDV, ich_hwseq_set_addr(), memcpy(), spi_flash::ops, printk, spi_flash::sector_size, spi_flash::size, spi_flash::spi, spi_flash_generic_probe(), spi_flash_ops, and spi_is_multichip().
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Definition at line 980 of file spi.c.
References BIOS_ERR, BIOS_INFO, cntlr, CONFIG, ich_spi_controller::fpr, ich_spi_controller::fpr_max, ICH9_SPI_FPR_RPE, printk, read32(), READ_PROTECT, READ_WRITE_PROTECT, region_offset(), region_sz(), spi_fpr(), SPI_FPR_WPE, type, write32(), and WRITE_PROTECT.
Definition at line 958 of file spi.c.
References base, CONFIG, ICH7_SPI_FPR_LIMIT_SHIFT, ICH7_SPI_FPR_MASK, ICH9_SPI_FPR_LIMIT_SHIFT, ICH9_SPI_FPR_MASK, mask, SPI_FPR_BASE_SHIFT, and SPI_FPR_SHIFT.
Referenced by spi_flash_protect().
Init all SPI controllers with default values and enable all SPI controller.
Definition at line 285 of file spi.c.
References ich_spi_controller::addr, ich7_spi_regs::bbar, ich9_spi_regs::bbar, ich_spi_controller::bbar, cntlr, CONFIG, ich_spi_controller::control, ich_spi_controller::data, ich_spi_controller::databytes, ich9_spi_regs::faddr, ich9_spi_regs::fdata, ich9_spi_regs::fdoc, ich9_spi_regs::fdod, ich_spi_controller::flcomp, ich_spi_controller::flmap0, ich_spi_controller::fpr, ich_spi_controller::fpr_max, get_spi_bar(), ich9_spi_regs::hsfs, ich_spi_controller::hsfs, HSFS_FDV, ich_spi_controller::ich7_spi, ich_spi_controller::ich9_spi, ich_set_bbar(), ich_spi_controller::menubytes, ich7_spi_regs::opmenu, ich9_spi_regs::opmenu, ich_spi_controller::opmenu, ich7_spi_regs::optype, ich9_spi_regs::optype, ich_spi_controller::optype, ich7_spi_regs::pbr, PCI_DEV, ich9_spi_regs::pr, ich7_spi_regs::preop, ich9_spi_regs::preop, ich_spi_controller::preop, readl_, readw_, spi_set_smm_only_flashing(), ich7_spi_regs::spia, ich7_spi_regs::spic, ich7_spi_regs::spid, ich7_spi_regs::spis, ich9_spi_regs::ssfc, ich9_spi_regs::ssfs, ich_spi_controller::status, and writel_.
Definition at line 349 of file spi.c.
References spi_init().
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Definition at line 511 of file spi.c.
References cntlr, ich_spi_controller::flmap0, ich_spi_controller::hsfs, and HSFS_FDV.
Referenced by spi_flash_programmer_probe().
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Definition at line 340 of file spi.c.
References cntlr, CONFIG, ich9_spi_regs::hsfs, HSFS_FLOCKDN, ich_spi_controller::ich7_spi, ich_spi_controller::ich9_spi, readw_, and ich7_spi_regs::spis.
Referenced by spi_ctrlr_xfer(), spi_finalize_ops(), and spi_setup_opcode().
Definition at line 1108 of file spi.c.
Referenced by spi_finalize_ops(), and spi_init().
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Definition at line 464 of file spi.c.
References BIOS_DEBUG, spi_transaction::offset, spi_transaction::out, printk, SPI_OPCODE_TYPE_READ_NO_ADDRESS, SPI_OPCODE_TYPE_READ_WITH_ADDRESS, SPI_OPCODE_TYPE_WRITE_NO_ADDRESS, SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS, spi_use_out(), and spi_transaction::type.
Referenced by spi_ctrlr_xfer().
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Definition at line 412 of file spi.c.
References ARRAY_SIZE, BIOS_DEBUG, spi_transaction::bytesout, cntlr, MENU_BYTES, spi_transaction::opcode, ich_spi_controller::opmenu, ich_spi_controller::optype, spi_transaction::out, printk, read_reg(), readw_, spi_locked(), SPI_OPCODE_TYPE_WRITE_NO_ADDRESS, SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS, SPI_OPCODE_WREN, spi_use_out(), spi_transaction::type, writeb_, and writew_.
Referenced by spi_ctrlr_xfer().
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Definition at line 378 of file spi.c.
References spi_transaction::bytesin, spi_transaction::bytesout, spi_transaction::out, SPI_OPCODE_FAST_READ, SPI_OPCODE_TYPE_READ_NO_ADDRESS, SPI_OPCODE_TYPE_READ_WITH_ADDRESS, SPI_OPCODE_TYPE_WRITE_NO_ADDRESS, SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS, and spi_transaction::type.
Referenced by spi_ctrlr_xfer().
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Definition at line 372 of file spi.c.
References spi_transaction::bytesin, and spi_transaction::in.
Referenced by spi_ctrlr_xfer().
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Definition at line 366 of file spi.c.
References spi_transaction::bytesout, and spi_transaction::out.
Referenced by spi_ctrlr_xfer(), spi_setup_offset(), and spi_setup_opcode().
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Definition at line 943 of file spi.c.
References count, slave, spi_ctrlr_xfer(), and spi_flash_vector_helper().
struct ich9_spi_regs __packed |
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Definition at line 30 of file spi.c.
Referenced by ich_fill_data(), ich_hwseq_erase(), ich_hwseq_read(), ich_hwseq_set_addr(), ich_hwseq_wait_for_cycle_complete(), ich_hwseq_write(), ich_read_data(), ich_set_bbar(), ich_status_poll(), spi_ctrlr_xfer(), spi_finalize_ops(), spi_flash_programmer_probe(), spi_flash_protect(), spi_init(), spi_is_multichip(), spi_locked(), and spi_setup_opcode().
const struct spi_ctrlr_buses spi_ctrlr_bus_map[] |
Definition at line 1108 of file spi.c.
Referenced by gspi_read_bus_range(), and spi_setup_slave().
const size_t spi_ctrlr_bus_map_count = ARRAY_SIZE(spi_ctrlr_bus_map) |
Definition at line 1143 of file spi.c.
Referenced by gspi_read_bus_range(), and spi_setup_slave().
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Definition at line 848 of file spi.c.
Referenced by spi_flash_programmer_probe().