coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
spi.c File Reference
#include <string.h>
#include <bootstate.h>
#include <commonlib/helpers.h>
#include <delay.h>
#include <device/mmio.h>
#include <device/pci_ops.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
#include <spi_flash.h>
#include <spi-generic.h>
#include <timer.h>
#include <types.h>
#include "spi.h"
Include dependency graph for spi.c:

Go to the source code of this file.

Data Structures

struct  ich7_spi_regs
 
struct  ich9_spi_regs
 
struct  ich_spi_controller
 
struct  spi_transaction
 

Macros

#define __SIMPLE_DEVICE__
 
#define HSFC_FCYCLE_OFF   1 /* 1-2: FLASH Cycle */
 
#define HSFC_FCYCLE   (0x3 << HSFC_FCYCLE_OFF)
 
#define HSFC_FDBC_OFF   8 /* 8-13: Flash Data Byte Count */
 
#define HSFC_FDBC   (0x3f << HSFC_FDBC_OFF)
 
#define readb_(a)   read8(a)
 
#define readw_(a)   read16(a)
 
#define readl_(a)   read32(a)
 
#define writeb_(val, addr)   write8(addr, val)
 
#define writew_(val, addr)   write16(addr, val)
 
#define writel_(val, addr)   write32(addr, val)
 
#define MENU_BYTES   member_size(struct ich9_spi_regs, opmenu)
 
#define RCBA   0xf0
 
#define SBASE   0x54
 
#define SPI_FPR_SHIFT   12
 
#define ICH7_SPI_FPR_MASK   0xfff
 
#define ICH9_SPI_FPR_MASK   0x1fff
 
#define SPI_FPR_BASE_SHIFT   0
 
#define ICH7_SPI_FPR_LIMIT_SHIFT   12
 
#define ICH9_SPI_FPR_LIMIT_SHIFT   16
 
#define ICH9_SPI_FPR_RPE   (1 << 15) /* Read Protect */
 
#define SPI_FPR_WPE   (1 << 31) /* Write Protect */
 
#define BIOS_CNTL   0xdc
 
#define BIOS_CNTL_BIOSWE   (1 << 0)
 
#define BIOS_CNTL_BLE   (1 << 1)
 
#define BIOS_CNTL_SMM_BWP   (1 << 5)
 

Typedefs

typedef struct spi_transaction spi_transaction
 

Enumerations

enum  {
  SPIS_SCIP = 0x0001 , SPIS_GRANT = 0x0002 , SPIS_CDS = 0x0004 , SPIS_FCERR = 0x0008 ,
  SSFS_AEL = 0x0010 , SPIS_LOCK = 0x8000 , SPIS_RESERVED_MASK = 0x7ff0 , SSFS_RESERVED_MASK = 0x7fe2
}
 
enum  {
  SPIC_SCGO = 0x000002 , SPIC_ACS = 0x000004 , SPIC_SPOP = 0x000008 , SPIC_DBC = 0x003f00 ,
  SPIC_DS = 0x004000 , SPIC_SME = 0x008000 , SSFC_SCF_MASK = 0x070000 , SSFC_RESERVED = 0xf80000
}
 
enum  {
  HSFS_FDONE = 0x0001 , HSFS_FCERR = 0x0002 , HSFS_AEL = 0x0004 , HSFS_BERASE_MASK = 0x0018 ,
  HSFS_BERASE_SHIFT = 3 , HSFS_SCIP = 0x0020 , HSFS_FDOPSS = 0x2000 , HSFS_FDV = 0x4000 ,
  HSFS_FLOCKDN = 0x8000
}
 
enum  {
  HSFC_FGO = 0x0001 , HSFC_FCYCLE_MASK = 0x0006 , HSFC_FCYCLE_SHIFT = 1 , HSFC_FDBC_MASK = 0x3f00 ,
  HSFC_FDBC_SHIFT = 8 , HSFC_FSMIE = 0x8000
}
 
enum  { SPI_OPCODE_TYPE_READ_NO_ADDRESS = 0 , SPI_OPCODE_TYPE_WRITE_NO_ADDRESS = 1 , SPI_OPCODE_TYPE_READ_WITH_ADDRESS = 2 , SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS = 3 }
 

Functions

static int spi_is_multichip (void)
 
static void spi_set_smm_only_flashing (bool enable)
 
static void write_reg (const void *value, void *dest, uint32_t size)
 
static void read_reg (const void *src, void *value, uint32_t size)
 
static void ich_set_bbar (uint32_t minaddr)
 
static voidget_spi_bar (pci_devfn_t dev)
 
void spi_init (void)
 Init all SPI controllers with default values and enable all SPI controller. More...
 
static int spi_locked (void)
 
static void spi_init_cb (void *unused)
 
 BOOT_STATE_INIT_ENTRY (BS_DEV_INIT, BS_ON_ENTRY, spi_init_cb, NULL)
 
static void spi_use_out (spi_transaction *trans, unsigned int bytes)
 
static void spi_use_in (spi_transaction *trans, unsigned int bytes)
 
static void spi_setup_type (spi_transaction *trans)
 
static int spi_setup_opcode (spi_transaction *trans)
 
static int spi_setup_offset (spi_transaction *trans)
 
static int ich_status_poll (u16 bitmask, int wait_til_set)
 
static int spi_ctrlr_xfer (const struct spi_slave *slave, const void *dout, size_t bytesout, void *din, size_t bytesin)
 
static void ich_hwseq_set_addr (uint32_t addr)
 
static int ich_hwseq_wait_for_cycle_complete (unsigned int timeout, unsigned int len)
 
static int ich_hwseq_erase (const struct spi_flash *flash, u32 offset, size_t len)
 
static void ich_read_data (uint8_t *data, int len)
 
static int ich_hwseq_read (const struct spi_flash *flash, u32 addr, size_t len, void *buf)
 
static void ich_fill_data (const uint8_t *data, int len)
 
static int ich_hwseq_write (const struct spi_flash *flash, u32 addr, size_t len, const void *buf)
 
static int spi_flash_programmer_probe (const struct spi_slave *spi, struct spi_flash *flash)
 
static int xfer_vectors (const struct spi_slave *slave, struct spi_op vectors[], size_t count)
 
static u32 spi_fpr (u32 base, u32 limit)
 
static int spi_flash_protect (const struct spi_flash *flash, const struct region *region, const enum ctrlr_prot_type type)
 
void spi_finalize_ops (void)
 
__weak void intel_southbridge_override_spi (struct intel_swseq_spi_config *spi_config)
 

Variables

struct ich7_spi_regs __packed
 
static struct ich_spi_controller cntlr
 
static const struct spi_flash_ops spi_flash_ops
 
static const struct spi_ctrlr spi_ctrlr
 
const struct spi_ctrlr_buses spi_ctrlr_bus_map []
 
const size_t spi_ctrlr_bus_map_count = ARRAY_SIZE(spi_ctrlr_bus_map)
 

Macro Definition Documentation

◆ __SIMPLE_DEVICE__

#define __SIMPLE_DEVICE__

Definition at line 3 of file spi.c.

◆ BIOS_CNTL

#define BIOS_CNTL   0xdc

Definition at line 1103 of file spi.c.

◆ BIOS_CNTL_BIOSWE

#define BIOS_CNTL_BIOSWE   (1 << 0)

Definition at line 1104 of file spi.c.

◆ BIOS_CNTL_BLE

#define BIOS_CNTL_BLE   (1 << 1)

Definition at line 1105 of file spi.c.

◆ BIOS_CNTL_SMM_BWP

#define BIOS_CNTL_SMM_BWP   (1 << 5)

Definition at line 1106 of file spi.c.

◆ HSFC_FCYCLE

#define HSFC_FCYCLE   (0x3 << HSFC_FCYCLE_OFF)

Definition at line 24 of file spi.c.

◆ HSFC_FCYCLE_OFF

#define HSFC_FCYCLE_OFF   1 /* 1-2: FLASH Cycle */

Definition at line 23 of file spi.c.

◆ HSFC_FDBC

#define HSFC_FDBC   (0x3f << HSFC_FDBC_OFF)

Definition at line 26 of file spi.c.

◆ HSFC_FDBC_OFF

#define HSFC_FDBC_OFF   8 /* 8-13: Flash Data Byte Count */

Definition at line 25 of file spi.c.

◆ ICH7_SPI_FPR_LIMIT_SHIFT

#define ICH7_SPI_FPR_LIMIT_SHIFT   12

Definition at line 953 of file spi.c.

◆ ICH7_SPI_FPR_MASK

#define ICH7_SPI_FPR_MASK   0xfff

Definition at line 950 of file spi.c.

◆ ICH9_SPI_FPR_LIMIT_SHIFT

#define ICH9_SPI_FPR_LIMIT_SHIFT   16

Definition at line 954 of file spi.c.

◆ ICH9_SPI_FPR_MASK

#define ICH9_SPI_FPR_MASK   0x1fff

Definition at line 951 of file spi.c.

◆ ICH9_SPI_FPR_RPE

#define ICH9_SPI_FPR_RPE   (1 << 15) /* Read Protect */

Definition at line 955 of file spi.c.

◆ MENU_BYTES

#define MENU_BYTES   member_size(struct ich9_spi_regs, opmenu)

Definition at line 259 of file spi.c.

◆ RCBA

#define RCBA   0xf0

Definition at line 262 of file spi.c.

◆ readb_

#define readb_ (   a)    read8(a)

Definition at line 206 of file spi.c.

◆ readl_

#define readl_ (   a)    read32(a)

Definition at line 208 of file spi.c.

◆ readw_

#define readw_ (   a)    read16(a)

Definition at line 207 of file spi.c.

◆ SBASE

#define SBASE   0x54

Definition at line 263 of file spi.c.

◆ SPI_FPR_BASE_SHIFT

#define SPI_FPR_BASE_SHIFT   0

Definition at line 952 of file spi.c.

◆ SPI_FPR_SHIFT

#define SPI_FPR_SHIFT   12

Definition at line 949 of file spi.c.

◆ SPI_FPR_WPE

#define SPI_FPR_WPE   (1 << 31) /* Write Protect */

Definition at line 956 of file spi.c.

◆ writeb_

#define writeb_ (   val,
  addr 
)    write8(addr, val)

Definition at line 209 of file spi.c.

◆ writel_

#define writel_ (   val,
  addr 
)    write32(addr, val)

Definition at line 211 of file spi.c.

◆ writew_

#define writew_ (   val,
  addr 
)    write16(addr, val)

Definition at line 210 of file spi.c.

Typedef Documentation

◆ spi_transaction

Enumeration Type Documentation

◆ anonymous enum

anonymous enum
Enumerator
SPIS_SCIP 
SPIS_GRANT 
SPIS_CDS 
SPIS_FCERR 
SSFS_AEL 
SPIS_LOCK 
SPIS_RESERVED_MASK 
SSFS_RESERVED_MASK 

Definition at line 104 of file spi.c.

◆ anonymous enum

anonymous enum
Enumerator
SPIC_SCGO 
SPIC_ACS 
SPIC_SPOP 
SPIC_DBC 
SPIC_DS 
SPIC_SME 
SSFC_SCF_MASK 
SSFC_RESERVED 

Definition at line 115 of file spi.c.

◆ anonymous enum

anonymous enum
Enumerator
HSFS_FDONE 
HSFS_FCERR 
HSFS_AEL 
HSFS_BERASE_MASK 
HSFS_BERASE_SHIFT 
HSFS_SCIP 
HSFS_FDOPSS 
HSFS_FDV 
HSFS_FLOCKDN 

Definition at line 126 of file spi.c.

◆ anonymous enum

anonymous enum
Enumerator
HSFC_FGO 
HSFC_FCYCLE_MASK 
HSFC_FCYCLE_SHIFT 
HSFC_FDBC_MASK 
HSFC_FDBC_SHIFT 
HSFC_FSMIE 

Definition at line 138 of file spi.c.

◆ anonymous enum

anonymous enum
Enumerator
SPI_OPCODE_TYPE_READ_NO_ADDRESS 
SPI_OPCODE_TYPE_WRITE_NO_ADDRESS 
SPI_OPCODE_TYPE_READ_WITH_ADDRESS 
SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS 

Definition at line 147 of file spi.c.

Function Documentation

◆ BOOT_STATE_INIT_ENTRY()

BOOT_STATE_INIT_ENTRY ( BS_DEV_INIT  ,
BS_ON_ENTRY  ,
spi_init_cb  ,
NULL   
)

◆ get_spi_bar()

static void* get_spi_bar ( pci_devfn_t  dev)
static

Definition at line 265 of file spi.c.

References CONFIG, pci_read_config32(), RCBA, and SBASE.

Referenced by spi_init().

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◆ ich_fill_data()

static void ich_fill_data ( const uint8_t data,
int  len 
)
static

Definition at line 826 of file spi.c.

References cntlr, ich_spi_controller::data, and writel_.

Referenced by ich_hwseq_write().

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◆ ich_hwseq_erase()

static int ich_hwseq_erase ( const struct spi_flash flash,
u32  offset,
size_t  len 
)
static

◆ ich_hwseq_read()

static int ich_hwseq_read ( const struct spi_flash flash,
u32  addr,
size_t  len,
void buf 
)
static

◆ ich_hwseq_set_addr()

static void ich_hwseq_set_addr ( uint32_t  addr)
static

Definition at line 668 of file spi.c.

References addr, cntlr, ich9_spi_regs::faddr, ich_spi_controller::ich9_spi, readl_, and writel_.

Referenced by ich_hwseq_erase(), ich_hwseq_read(), ich_hwseq_write(), and spi_flash_programmer_probe().

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◆ ich_hwseq_wait_for_cycle_complete()

static int ich_hwseq_wait_for_cycle_complete ( unsigned int  timeout,
unsigned int  len 
)
static

Definition at line 679 of file spi.c.

References addr, BIOS_ERR, cntlr, ich9_spi_regs::faddr, ich9_spi_regs::hsfc, ich9_spi_regs::hsfs, HSFS_FCERR, HSFS_FDONE, ich_spi_controller::ich9_spi, printk, readl_, readw_, udelay(), and writew_.

Referenced by ich_hwseq_erase(), ich_hwseq_read(), and ich_hwseq_write().

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◆ ich_hwseq_write()

static int ich_hwseq_write ( const struct spi_flash flash,
u32  addr,
size_t  len,
const void buf 
)
static

◆ ich_read_data()

static void ich_read_data ( uint8_t data,
int  len 
)
static

Definition at line 767 of file spi.c.

References cntlr, ich_spi_controller::data, and readl_.

Referenced by ich_hwseq_read().

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◆ ich_set_bbar()

static void ich_set_bbar ( uint32_t  minaddr)
static

Definition at line 245 of file spi.c.

References ich_spi_controller::bbar, cntlr, readl_, and writel_.

Referenced by spi_init().

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◆ ich_status_poll()

static int ich_status_poll ( u16  bitmask,
int  wait_til_set 
)
static

Definition at line 491 of file spi.c.

References BIOS_DEBUG, cntlr, printk, readw_, ich_spi_controller::status, udelay(), and writew_.

Referenced by spi_ctrlr_xfer().

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◆ intel_southbridge_override_spi()

__weak void intel_southbridge_override_spi ( struct intel_swseq_spi_config spi_config)

Definition at line 1099 of file spi.c.

Referenced by spi_finalize_ops().

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◆ read_reg()

static void read_reg ( const void src,
void value,
uint32_t  size 
)
static

Definition at line 230 of file spi.c.

References readb_, readl_, and value.

Referenced by spi_ctrlr_xfer(), spi_setup_opcode(), wait_for_state_idle(), and wait_for_state_ready().

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◆ spi_ctrlr_xfer()

◆ spi_finalize_ops()

◆ spi_flash_programmer_probe()

static int spi_flash_programmer_probe ( const struct spi_slave spi,
struct spi_flash flash 
)
static

◆ spi_flash_protect()

static int spi_flash_protect ( const struct spi_flash flash,
const struct region region,
const enum ctrlr_prot_type  type 
)
static

◆ spi_fpr()

static u32 spi_fpr ( u32  base,
u32  limit 
)
static

Definition at line 958 of file spi.c.

References base, CONFIG, ICH7_SPI_FPR_LIMIT_SHIFT, ICH7_SPI_FPR_MASK, ICH9_SPI_FPR_LIMIT_SHIFT, ICH9_SPI_FPR_MASK, mask, SPI_FPR_BASE_SHIFT, and SPI_FPR_SHIFT.

Referenced by spi_flash_protect().

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◆ spi_init()

◆ spi_init_cb()

static void spi_init_cb ( void unused)
static

Definition at line 349 of file spi.c.

References spi_init().

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◆ spi_is_multichip()

static int spi_is_multichip ( void  )
static

Definition at line 511 of file spi.c.

References cntlr, ich_spi_controller::flmap0, ich_spi_controller::hsfs, and HSFS_FDV.

Referenced by spi_flash_programmer_probe().

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◆ spi_locked()

static int spi_locked ( void  )
static

Definition at line 340 of file spi.c.

References cntlr, CONFIG, ich9_spi_regs::hsfs, HSFS_FLOCKDN, ich_spi_controller::ich7_spi, ich_spi_controller::ich9_spi, readw_, and ich7_spi_regs::spis.

Referenced by spi_ctrlr_xfer(), spi_finalize_ops(), and spi_setup_opcode().

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◆ spi_set_smm_only_flashing()

static void spi_set_smm_only_flashing ( bool  enable)
static

Definition at line 1108 of file spi.c.

Referenced by spi_finalize_ops(), and spi_init().

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◆ spi_setup_offset()

static int spi_setup_offset ( spi_transaction trans)
static

Definition at line 464 of file spi.c.

References BIOS_DEBUG, spi_transaction::offset, spi_transaction::out, printk, SPI_OPCODE_TYPE_READ_NO_ADDRESS, SPI_OPCODE_TYPE_READ_WITH_ADDRESS, SPI_OPCODE_TYPE_WRITE_NO_ADDRESS, SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS, spi_use_out(), and spi_transaction::type.

Referenced by spi_ctrlr_xfer().

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◆ spi_setup_opcode()

◆ spi_setup_type()

◆ spi_use_in()

static void spi_use_in ( spi_transaction trans,
unsigned int  bytes 
)
inlinestatic

Definition at line 372 of file spi.c.

References spi_transaction::bytesin, and spi_transaction::in.

Referenced by spi_ctrlr_xfer().

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◆ spi_use_out()

static void spi_use_out ( spi_transaction trans,
unsigned int  bytes 
)
inlinestatic

Definition at line 366 of file spi.c.

References spi_transaction::bytesout, and spi_transaction::out.

Referenced by spi_ctrlr_xfer(), spi_setup_offset(), and spi_setup_opcode().

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◆ write_reg()

static void write_reg ( const void value,
void dest,
uint32_t  size 
)
static

Definition at line 215 of file spi.c.

References value, writeb_, and writel_.

Referenced by spi_ctrlr_xfer().

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◆ xfer_vectors()

static int xfer_vectors ( const struct spi_slave slave,
struct spi_op  vectors[],
size_t  count 
)
static

Definition at line 943 of file spi.c.

References count, slave, spi_ctrlr_xfer(), and spi_flash_vector_helper().

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Variable Documentation

◆ __packed

◆ cntlr

◆ spi_ctrlr

const struct spi_ctrlr spi_ctrlr
static
Initial value:
= {
.xfer_vector = xfer_vectors,
.max_xfer_size = member_size(struct ich9_spi_regs, fdata),
.flash_protect = spi_flash_protect,
}
#define member_size(type, member)
Definition: helpers.h:92
static int xfer_vectors(const struct spi_slave *slave, struct spi_op vectors[], size_t count)
Definition: spi.c:943
static int spi_flash_programmer_probe(const struct spi_slave *spi, struct spi_flash *flash)
Definition: spi.c:903
static int spi_flash_protect(const struct spi_flash *flash, const struct region *region, const enum ctrlr_prot_type type)
Definition: spi.c:980

Definition at line 1108 of file spi.c.

◆ spi_ctrlr_bus_map

const struct spi_ctrlr_buses spi_ctrlr_bus_map[]
Initial value:
= {
{
.ctrlr = &spi_ctrlr,
.bus_start = 0,
.bus_end = 0,
},
}
const struct spi_ctrlr spi_ctrlr
Definition: spi.c:261

Definition at line 1108 of file spi.c.

Referenced by gspi_read_bus_range(), and spi_setup_slave().

◆ spi_ctrlr_bus_map_count

const size_t spi_ctrlr_bus_map_count = ARRAY_SIZE(spi_ctrlr_bus_map)

Definition at line 1143 of file spi.c.

Referenced by gspi_read_bus_range(), and spi_setup_slave().

◆ spi_flash_ops

const struct spi_flash_ops spi_flash_ops
static
Initial value:
= {
.read = ich_hwseq_read,
.write = ich_hwseq_write,
.erase = ich_hwseq_erase,
}
static int ich_hwseq_read(const struct spi_flash *flash, u32 addr, size_t len, void *buf)
Definition: spi.c:780
static int ich_hwseq_erase(const struct spi_flash *flash, u32 offset, size_t len)
Definition: spi.c:717
static int ich_hwseq_write(const struct spi_flash *flash, u32 addr, size_t len, const void *buf)
Definition: spi.c:848

Definition at line 848 of file spi.c.

Referenced by spi_flash_programmer_probe().