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coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <stdint.h>
#include <device/pci_def.h>
#include <cpu/x86/msr.h>
#include <cpu/intel/speedstep.h>
#include "gm45.h"
Go to the source code of this file.
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static int | sku_freq_index (const gmch_gfx_t sku, const int low_power_mode) |
static void | init_freq_scaling (const gmch_gfx_t sku, const int low_power_mode) |
void | init_pm (const sysinfo_t *const sysinfo, int do_freq_scaling_cfg) |
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Definition at line 27 of file pm.c.
References GMCH_GE45, GMCH_GM45, GMCH_GM47, GMCH_GM49, GMCH_GS45, mchbar_clrbits32, mchbar_clrsetbits16(), mchbar_clrsetbits32(), mchbar_setbits16, mchbar_write16(), mchbar_write32(), mchbar_write8(), raminit_read_vco_index(), sku, and sku_freq_index().
Referenced by init_pm().
Definition at line 121 of file pm.c.
References CLKCFG_MCHBAR, sysinfo::cores, timings::fsb_clock, FSB_CLOCK_1067MHz, FSB_CLOCK_667MHz, FSB_CLOCK_800MHz, GMCH_PM45, GMCH_UNKNOWN, init_freq_scaling(), msr_struct::lo, mchbar_clrbits16, mchbar_clrbits32, mchbar_clrbits8, mchbar_clrsetbits16(), mchbar_clrsetbits32(), mchbar_clrsetbits8(), mchbar_read16(), mchbar_read32(), mchbar_setbits16, mchbar_setbits32, mchbar_setbits8, mchbar_write16(), mchbar_write32(), mchbar_write8(), timings::mem_clock, MEM_CLOCK_667MT, memclk(), MSR_EXTENDED_CONFIG, rdmsr(), sysinfo::selected_timings, stepping, STEPPING_B0, STEPPING_B1, STEPPING_B2, STEPPING_B3, and STEPPING_CONVERSION_A1.
Referenced by mainboard_romstage_entry().
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